JVC KD-LH7R Service Manual page 43

QQ
3 7 63 1515 0
3.Pin function(1/2)
Pin No. Symbol
1
/RESET
2
MiMD
3
AD0
4
AD1
5
MiDio
6
/MiCK
7
AD2
8
VDDT
9
SDo
10
AD3
11
AD4
12
SDi0
13
BCKiA
14
LRCKiA
15
AD5
16
CE
17
OE
18
VDD
19
STANBY
20
VSS
21
VSSL
22
VRAL
23
LO
24
VDAL
25
VDAR
TE
L 13942296513
26
RO
27
VRAR
28
VSSR
29
TESTP
30
CKS
31
AD12
32
AD11
33
AD10
34
AD9
35
VDDT
36
AD8
37
AD7
38
AD6
39
REQ
40
VSS
41
AD13
42
AD14
43
WR
44
AD16
45
AD15
46
io0
47
io1
48
VSS
49
io2
www
50
io3
.
http://www.xiaoyu163.com
eàYGNg u5•ïVþ•Q
I/O
Hard reset input terminal(H:Normal operation L: Reset)
I
Micon I/F mode select input terminal
I
External SRAM address output 0 terminal
O
External SRAM address output 1 terminal
O
Micon I/F data input/output terminal
I/O
Micon I/F clock input terminal
I
External SRAM address output 2 terminal
O
Digital power supply (3.3V)
-
Data output terminal
O
External SRAM address output 3 terminal
O
External SRAM address output 4 terminal
O
Data input terminal 0
I
Bit clock input terminal A
I
LR clock input terminal A
I
External SRAM address output 5 terminal
O
External SRAM chip enable terminal
O
External SRAM output enable terminal
O
Digital power supply (2.5V)
-
Standby mode control terminal
I
Digital GND
-
DAC Lch GND
-
DAC Lch reference voltage terminal
-
DAC Lch output terminal
O
DAC Rch power supply terminal(2.5V)
-
DAC Lch power supply terminal(2.5V)
-
DAC Rch output terminal
O
DAC Rch reference voltage terminal
-
DAC Rch GND
-
Test terminal
I
VCO select terminal
I
External SRAM address output 12 terminal
O
External SRAM address output 11 terminal
O
External SRAM address output 10 terminal
O
External SRAM address output 9 terminal
O
Digital power supply terminal (3.3V)
-
External SRAM address output 8 terminal
O
External SRAM address output 7 terminal
O
External SRAM address output 6 terminal
O
Squeeze request terminal to host
O
Digital GND
-
External SRAM address output 13 terminal
O
External SRAM address output 14 terminal
O
External SRAM write signal
O
External SRAM address output 16 terminal
O
External SRAM address output 15 terminal
O
External SRAM data input/output 0 terminal
I/O
External SRAM data input/output 1 terminal
I/O
Digital GND
-
External SRAM data input/output 2 terminal
I/O
External SRAM data input/output 3 terminal
I/O
x ao u163
y
i
http://www.xiaoyu163.com
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3 6 7 1 3 1 5
co
.
9 4 2 8
TC94A02F-005
0 5 8 2 9 9 4 2 8
m
KD-LH7R
9 9
9 9
1-43