JVC KD-LH7R Service Manual page 28

KD-LH7R
QQ
3 7 63 1515 0
HA13164A(IC901):Regulator
1.Terminal layout
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
2.Block diagram
ANT
C3
0.1u
EXT
C4
0.1u
ANT CTRL
CTRL
CD8V
TE
C5
L 13942296513
0.1u
9V
C6
10u
3.Pin function
Pin No. Symbol
1 EXT
2 OUT
3 ACC.IN
4 VDD5V
5 SW5V
6 ACC5V
7 ANT.CTRL
8 MEMORY.IN
9 BATT.DET
10 9V
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11 CTRL
12 CD8V
13 AJ
14 10V
15 GND
1-28
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MEMORY.IN
2
1
7
11
12
10
GND
Output voltage is VCC-1 V when M or H level applied to CTRL pin.
Output voltage is VCC-1 V when M or H level to CTRL pin and H level
to ANT-CTRL.
Connected to ACC.
Regular 5.7V.
Output voltage is 5V when M or H level applied to CTRL pin.
Output for ACC detector.
L:ANT output OFF , H:ANT output ON
Connected to VCC.
Low battery detect.
Output voltage is 9V when M or H level applied to CTRL pin.
L:BIAS OFF, M:BIAS ON, H:CD ON
x ao
y
Output voltage is 8V when H level applied to CTRL pin.
Adjustment pin for ILM output voltage.
. i
Output voltage is 10V when M or H level applied to CTRL pin.
Connected to GND.
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8
C1 C2
100u 0.1u
ACC.IN
8
3
Surge Protector
BIAS TSD
Q Q
3 6 7 1 3
15 TAB 13
GND AJ
note1) TAB (header of IC)
connected to GND
Function
u163
.
2 9 9 4 2 8
+B
ACC
BATT.DET
9
ACC5V
6
VDD5V
4
C7
0.1u
SW5VOUT
5
1 5 0 5 8 2 9 9 4
10V
14
C8
0.1u
R1
UNIT R:
C:F
m
co
9 9
2 8 9 9