System Control Block Diagram - Sony RMT-D145E Service Manual

DVP-K380
Q Q
3 7 6 3 1 5 1 5 0

3-4. SYSTEM CONTROL BLOCK DIAGRAM

MB-103 BOARD (3/4)
(SEE PAGE 4-21 to 4-24)
HA 0 – 21
HD 0 – 15
XRD
XWRH
SIGNAL PROCESSOR
(SEE PAGE 3-5)
XARPIT
XARPCS
XWAIT
XRST
XRST
XSDPIT
XSDPCS
RF/SERVO
XDRVMUTE
(SEE PAGE 3-4)
XLDON
CKSW1
OCSW1
T E
L 1 3 9 4 2 2 9 6 5 1 3
XAVDIT
DREQ0
DACK0
DREQ1
DACK1
XAVDCS2
XAVDCS3
TRST
SIGNAL PROCESSOR
(SEE PAGE 3-5)
33MARP
w w w
27MAVD
512FSAVD
16
IC106
FLASH
HA 0 – 21
HD 0 – 15
1 – 5 102 – 109 111 – 118 120 85 – 100
HA 0 – 21 HD 0 – 15
70 XRD
71 XWRH
17 INT1
62 CS4X
67 XWAIT
35 XRST
18 INT2
63 CS5X
48 XDRVMUTE
82 WIDE
56 CKSW1
57 OCSW1
IC101
EEPROM
WP 7 7 WP
SCL 6 39 SCL
SDA 5 38 SDA
16 INTO
46 DREQ0
47 DACK0
49 DREQ1
50 DACK1
60 CS2X
61 CS3X
81
IC103 qg
14
3.3Vp-p
29.5nsec
15
3
x a o
y
. i
3-7
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58
X1
53
X101
16.5MHz
X2
54
XARPRST 36
IC104
SYSTEM
CONTROL
Q Q
3 7 6
SI0 25
SO0 26
SCO 27
XIFCS 51
INT4 20
XFRRST 76
MAMUTE 83
SO1 29
SC1 30
XDACS 79
IC103 8
IC103
PLL
3.3Vp-p
37.4nsec
XTI
7
FSEL
X102
27MHz
XTO 8
33-1OUT 512-2OUT 9
512-1OUT 10
27-1OUT
u 1 6 3
IC103 3
.
3.3Vp-p
37.4nsec
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2 4
8 9 9
IC104 tf
3.3Vp-p
60.6nsec
CN601 (2/3)
WIDE
3 1 5 1 5 0 8 9 2
SI0
SO0
SC0
XIFCS
IFBSY
TRST
MAMUTE
SO1
SC1
XDACS
AUDIO
(SEE PAGE 3-11)
XRST
IC103 9,q;
3.3Vp-p
40.8nsec
512FS2CH
m
c o
3-8
2
8 9 9
VIDEO
WIDE
2
(SEE PAGE 3-9)
CN101
4 9 8 2 9 9
4 SI0
SO0
1
INTERFACE
3 SC0
CONTROL
6 XIFCS
(SEE PAGE 3-13)
XIFBUSY
5
8 XFRRST