Signal Processor Block Diagram - Sony RMT-D145E Service Manual

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3 7 6 3 1 5 1 5 0

3-3. SIGNAL PROCESSOR BLOCK DIAGRAM

MB-103 BOARD (2/4)
(SEE PAGE 4-15 to 4-20)
RF/SERVO
SIGO
(SEE PAGE 3-4)
T E
L 1 3 9 4 2 2 9 6 5 1 3
XARPIT
XARPCS
XWAIT
33MARP
XWRH
XRD
TRST
HA 0 – 21 HA 0 – 21
SYSTEM CONTROL
(SEE PAGE 3-7)
HD 0 – 15 HD 0 – 15
XRST
512FSAVD
XAVDCS2
XAVDCS3
27MAVD
XAVDIT
w w w
DREQ0
DACK0
.
DREQ1
DACK1
16
IC303
16M DRAM
65 – 74 36 – 43 29 31
46 – 53 30
MA 0 – 9
MD 0 – 15
111 RFIN1
77
SD 0 – 7 SDI 0 – 7
84
113 RFIN2
SDCK
57 SDCK, XSHD,
XSHD
XSRQ, XSAK, SDEF
XSRQ
59
XSAK
63
SDEF 64
IC301
(2/2)
CDDATA, CDBCK,
ARP
DATA 169
CDLRCK, CDDOUT
BCLK 170
LRCK 175
DOUT 56
2
26 XINT
A 0 – 7 HA 0 – 7
27 XCS
9
28 XWAT
134
150 CLKIN
D 0 – 7 HD 8 – 15
141
TDO 175
24 XWR
TCK 174
25 XRD
TDI 173
TMS 172
TRST 171
LAND
(FOR J TAG)
x a o
y
i
3-5
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8
IC404,405
16M SDRAM
135-138 140-143
105-108 110-113
145-148 150
115 116 118 120
151 153 154
SDDQ 0 – 15
37
40
DTI 0 – 7
42
45
ICLKI
IERRI
47
ISTARTI
51
IVALI
IREQO
31 CDIN2I
32
CDIN1I
34 CDBCKI
35
CDLRKI
Q Q
3 7 6 3
168-169
171-174
176-179
HA 0 – 21 HAD 0 – 21
181-184
186-189
191-194
2 – 5
7 – 10
HD 0 – 15 HD 0 – 15
12 – 15
17 – 20
IC403
97 TDI
AV DECODER
99 TCK
98 TDO
101 TMS
102 TRST
XRD
196 HCSn
XWRH
197 HRWn
207 RSTn
22 ACLK
166 HAD23
167 HAD22
158 CLKI
160 SCLKI
200 HWAIT0n
199 HIREQ0
202 – 205
u 1 6 3
.
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2 4
9 9 8
122 124 125
127 129 130
132 133
Y/G
G OUT 57
CB/R
R OUT 59
CR/B
B OUT 61
COMPOUT
COMPOUT 65
YOUT
Y OUT 55
COUT
C OUT 63
1 5 1 5 0 8 9 2 4
VREFI 70
RV401
VIDEO
LEVEL
ADJ
ACH12 24
ACH34 25
LAND
ACH56 26
LRCKO 28
BCKO 29
DO 30
m
c o
3-6
DVP-K380
2
9 9
CN601 (1/3)
5 Y/G
3 Cb/R
1 Cr/B
VIDEO
(SEE PAGE 3-9)
11 V
7 Y
9 C
9 8 2 9 9
ACH12
AUDIO
LRCK (SEE PAGE 3-11)
BCK
SPDIF