Denon S-302 Service Manual page 50
Dvd home entertainment system
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Also See for S-302:
- Owner's manual (63 pages) ,
- Quick setup manual (5 pages) ,
- Code list (3 pages)
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3 7 63 1515 0
Name
DCLK
UDAC
TE
L 13942296513
YUV0
PIXOUT0
VREF
YUV1
PIXOUT1
CDAC
YUV2
PIXOUT2
COMP
YUV3
PIXOUT3
RSET
YUV4
PIXOUT4
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Pin Numbers
I/O
Definition
105
I
Clock input to PLL; (5V tolerant input).
O
Video DAC output.
106
F: CVBS/chroma signal for simultaneous mode.
Y: Luma component for YUV and Y/C processing.
C: Chrominance signal for Y/C processing.
U: Chrominance component signal for YUV mode.
V: Chrominance component signal for YUV mode.
O
YUV pixel 0 output data.
O
CCIR656 output pixel 0.
I
Internal voltage reference to video DAC. Bypass to ground with 0.1- F capacitor.
107
O
YUV pixel 1 output data.
O
CCIR656 output pixel 1.
O
Video DAC output. Refer to description and matrix for UDAC pin 106.
108
O
YUV pixel 2 output data.
O
CCIR656 output pixel 2.
I
Compensation input. Bypass to ADVEE with 0.1- F capacitor.
109
O
YUV pixel 3 output data.
O
CCIR656 output pixel 3.
I
DAC current adjustment resistor input.
110
O
YUV pixel 4 output data.
O
CCIR656 output pixel 4.
x
ao
y
i
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8
F DAC
V DAC
Value
(pin 115)
(pin 114)
0
CVBS/Chroma
CVBS1
1
CVBS/Chroma
CVBS1
2
CVBS/Chroma
3
CVBS/Chroma
CVBS1
4
CVBS/Chroma
CVBS1
5
CVBS/Chroma
CVBS1
6
CVBS/Chroma
7
N/A
SYNC
8
CVBS/Chroma
Chroma
9
CVBS
CVBS1
10
CVBS
CVBS1
11
N/A
SYNC
12
CVBS/Chroma
13
CVBS/Chroma
CVBS1
Q Q
14
Chroma
3
6 7
1 3
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50
2 9
9 4
2 8
Y DAC
C DAC
(pin 113)
(pin 108)
Y
C
Y
C
N/A
Y
C
N/A
N/A
N/A
N/A
Y
Pb
N/A
Y
Pb
G
B
Y
Pb
G
B
G
R
G
R
N/A
Y
Pr
Y
Pr
Y
G
R
1 5
0 5
8
2 9
9 4
m
co
S-302
9 9
U DAC
(pin 106)
N/A
CVBS2
N/A
CVBS2
N/A
Pr
Pr
R
Pr
R
B
B
Pb
Pb
B
2 8
9 9
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