Socket Interlock Module Fault Sensor; Ipa Backplane - Harris ZX2500 Technical Manual

ZX Series
4.5.4

Socket Interlock Module Fault Sensor

In addition to the three fault conditions described above, a >3V PA current sample to
command a PS module shutdown can also be generated via R1-Q1 whenever the PA
module is unplugged and the connection to the ground of the base of Q1 via J5-V, J5-A,
J6-V, J6-A is broken
The PA backplane reports a module shutdown status to the controller board (via a
comparator on the PS interface board) whenever the 50V from the PS module is not
present. This sensing is done by transistors Q2 and Q3. A sample of the 50V passes
through voltage divider R3-R4, causing Q2 to conduct and Q3 not to conduct. The
MODULE_OFF signal line at J7-9 is common among all backplanes and is configured
to report a shutdown alarm on the controller whenever it is grounded at any backplane
(PA or IPA).
4.6

IPA Backplane

Consult drawing 801-0203-581
The IPA backplane is essentially the same as the PA backplane discussed earlier, but
with the noticeable difference that each half of the IPA module may be shut down
independently for greater redundancy. Accordingly, there is an independent set of three
fault comparators for each half of the IPA module: U2-B,C,D and U3-B,C,D.
The IPA module does not have its own corresponding PS module, but rather shares the
output of all the PS modules from the other PA modules. Accordingly it is not possible
to shut down the PS module via a +3.5V current sample, as in the case of the PA
backplane. Instead, the +50V DC feed to each half of the IPA module may be shut
down independently via PMOS pass FETs Q5 and Q6. When FET Q2 (Q4) is
conducting, the gate of Q5 (Q6) is pulled low via R74-R58-R59 (R75-R60-R61) and
LED DS1 (DS2) is lit, indicating that +50V is being applied to the IPA module half in
question. When Q2 (Q4) no longer conducts, the gate of Q5 (Q6) is pulled high,
thereby causing Q5 (Q6) to enter a high impedance state and interrupting the flow of
+50V power to the IPA module. Driver FET Q1 (Q3) provides a logic inversion such
that a high output from the fault comparators at U2 (U3), provides a low input to the
gate of Q2 (Q4).
The same set of three LEDS (DS3, DS4, DS5) is used to signal a fault condition for
both halves of the IPA module. They are shared via steering diode network CR6A
through CR6F. The status of LEDs DS1 and DS2 is usually sufficient to determine to
which half of the IPA module the fault applies (i.e. which LED is off).
12/20/11
WARNING: Disconnect primary power prior to servicing.
Section 4 Theory of Operation
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