Sharp FO-90 Service Manual page 31

FC200 (IC3) Terminal descriptions
Pin Name Pin No.
MIRQn 135
SYSCLK 133
TSTCLK 130
A[23:0] [1:6][8:13]
[15:20][22:27]
D[7:0] [136:139]
[141:144]
RDn 128
WRn 127
ROMCSn 120
CS1n 122
CS0n 57
MCSn 121
SYNC 126
REGDMA 124
WAITn 125
RASn 113
CAS[1:0]n [111:112]
DWRn 109
DEBUGn 129
RESETn 131
TEST 58
XIN 59
XOUT 60
PWRDWNn 62
BATRSTn 61
WRPROTn 110
START 101
CLK1 100
CLK1n 99
CLK2 98
FCS1n/VIDCTL0 96
FCS2n/VIDCTL1 97
PCLK/DMAACK 29
PDAT 30
PLAT 31
STRB[3:0] [33:36]
STRBPOL/DMAREQ 37
OPO[0]/GPO[8]/ 47
SMPWRCTRL
OPO[1]/GPO[9]/ 46
PMPWRCTRL
OPO[2]/GPO[10]/ 44
RINGER
OPO[3]/GPO[11] 43
OPO[4]/GPO[12]/ 42
SSTXD1
OPO[5]/GPO[13] 40
OPO[6]/GPO[14] 39
OPO[7]/GPO[15] 38
OPI[0]/GPIO[21]/ 52
SSRXD1
OPI[1]/GPIO[22]/ 51
SSSTAT1
Input Output
I/O
Type Type
CPU Control Interface
−
I HU Modem interrupt, active low. (Hysteresis In, Internal Pullup.)
−
I H System clock. (Hysteresis In.)
−
O 123XT Test clock.
Bus Control Interface
O TU 123XT Address bus (24-bit).
I/O TU 123XT Data bus (8-bit).
−
O 123XT Read strobe.
−
O 123XT Write strobe.
−
O 123XT ROM chip select.
−
O 123XT I/O chip select.
−
O 123XT SRAM chip select. (Battery powered.)
−
O 123XT Modem chip select.
−
O 123XT Indicates CPU op code fetch cycle (active high).
−
O 123XT Indicates REGSEL cycle and DMA cycle.
−
O 123XT Indicates current TSTCLK cycle is a wait state or a halt state.
−
O 123XT DRAM row address select. (Battery powered.)
−
O 123XT DRAM column address select. (Battery powered.)
−
O 123XT DRAM write. (Battery powered.)
Prime Power Reset Logic and Test
−
I HU External non-maskable input (NMI).
I/O HU 2XO FC200 Reset.
−
I C Sets Test mode (Battery powered).
Battery Power Control and Reset Logic
−
I OSC Crystal oscillator input pin.
−
O OSC Crystal oscillator output pin.
−
I H Used by external system to indicate -to FC200 - loss of prime power.
(Results in NMI)
−
I H Battery power reset input.
−
O 1XC (Battery powered.) Write protect during loss of VDD power.
NOTE:The functional logic is powered by battery power, but the output drive
is powered by DRAM battery power.
Scanner Interface
−
O 2XS Scanner shift gate control.
−
O 2XS Scanner clock.
−
O 2XS Scanner clock-inverted.
−
O 2XS Scanner reset gate control (or clock for CIS scanner).
−
O 2XT Flash memory chip select or Video Control signal.
−
O 2XT Flash memory chip select or Video Control signal.
Printer Interface
−
O 3XC Thermal Print Head (TPH) clock, or external DMAACK.
−
O 2XP Serial printing data (to TPH).
−
O 3XP TPH data latch.
−
O 1XP Strobe signals for the TPH.
−
I C Sets strobe polarity, active high/low or external DMA request.
Operator Panel Interface
−
O 2XL Keyboard/LED strobe [0] or GPO[8] or Scan Motor Power Control
−
O 2XL Keyboard/LED strobe [1] or GPO[9] or Print Motor Power Control
−
O 2XCT Keyboard/LED strobe [2] or GPO[10] or RINGER
−
O 2XL Keyboard/LED strobe [3] or GPO[11]
−
O 2XL Keyboard/LED strobe [4] or GPO[12] or SSTXD1 (for SSIF1)
−
O 2XL Keyboard/LED strobe [5] or GPO[13]
−
O 2XL Keyboard/LED strobe [6] or GPO[14]
−
O 2XL Keyboard/LED strobe [7] or GPO[15]
I/O HU 2XC (Pullup, Hysteresis In) Keyboard return [0] or GPIO[21] or SSRXD1
(for SSIF1)
I/O HU 2XC (Pullup, Hysteresis In) Keyboard return [1] or GPIO[22] or SSSTAT1
(for SSIF1)
5 – 3
Pin Description
(Note: Active low signals have an "n" pin name ending.)
FO-90RA