NEC PlasmaSync 50MP1 User Manual page 110

(3) Gate array block (Pre G/A IC7501)
IC7501 is used as a timing controller intended to generate a variety of timing pulses based on the clock and
horizontal sync signals from IC6701 (AD converter) and the vertical sync signal input entered from the YU
connector and the PC connector (Pin 12).
The clock signals and various pulses are fed to IC6501, IC6701, IC8003, and IC8502. According to the
signal type and the input mode, the output is generated through pulse changeover for IC8003 and IC8502
in conformity to the video signal output. (Refer to 1. Video signal processor block.)
IC7501 operates with the system clock signal (CLKS_PRE signal) sent from IC9000.
(4) Module side (output side) clock generator block
The clock signal on output side is generated at X9000 (76MHz). This clock signal is supplied to each IC and
the plasma display module.
(5) Gate array block (Post G/A IC9000)
IC9000 is used as a timing controller intended to generate a variety of timing pulses based on the clock and
horizontal sync signals from IC7501 (Pre G/A) and the clock signal from X9000.
The clock signals and various pulses are fed to IC8003, IC8502, IC9401, IC9403, and IC9404 on input side.
According to the signal type and the input mode, the output is generated through pulse changeover for
IC8003 and IC8502 in conformity to the video signal output. (Refer to 1. Video signal processor block.)
3. System control block
IC9501 is used as a microcomputer (µ-COM) for system control. In this IC9501, various controls are carried out,
such as input signal changeover, setting in the A/D converter block, adjustment of the timing and video chroma
block for the output signals from the timing controller, selection of the hue and color depth level for the HD
decoder and the method of digital signal processing, various controls of the plasma display module, diagnostic
judgment for troubleshooting inside the set, and so on.
Pin 34 of the microcomputer IC9501 is used as a reset terminal. It is connected to the reset IC (IC9505). This
terminal generally works at 5V.
The contents of control are described below. For the matters not described here, please refer to the relevant
explanations given to each individual circuit block.
(1) Input signal discrimination
The microcomputer performs the discrimination of input signal type based on the horizontal sync and verti-
cal sync signals (Pin 7 and Pin 9 of the YU connector and the PC connector) and the information (at Pins 1,
2, 4, and 5 of the BU connector) sent from the VIDEO PWB through the I2C bus. Based on the result of the
above-mentioned discrimination, the microcomputer performs the control of various blocks. During the
entry of VIDEO3 input (for an input at Terminal S), the detection of S2 (automatic discrimination of the
Terminal S system) is carried out.
With the voltage at Pin 3, the screen size (screen mode) is automatically modified.
Voltage at Pin 3
Result of discrimination
Screen size
During the entry of RGB3 input, the presence (if any) of the input signal is identified according to the status
of the SCDT terminal (Pin 100, at "H" in ordinary operation) and operation for power management is con-
ducted.
Other than the right
4:3 (general)
By user's selection
12
1.4~2.4V
4:3 (letter box) 16:9 (squeeze)
Zoom
3.5~5.0
Full