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X8DTN+ User's Manual
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the motherboard. Attach an
appropriate cable from the chassis
to inform you of a chassis intrusion
when the chassis is opened.
T-SGPIO Headers
Two SGPIO (Serial-Link General
Purpose Input/Output) headers
(T-SGPIO-1/T-SGPIO-2) are located
below the fl oppy drive on the mother-
board. These headers support serial
link interfaces for the onboard SATA
connectors. See the table on the
right for pin defi nitions. Refer to the
board layout below for the location.
P1 DIMM3A
P1 DIMM3B
P1 DIMM3C
P1 DIMM2A
P1 DIMM2B
P1 DIMM2C
P1 DIMM1A
P1 DIMM1B
P1 DIMM1C
CPU1
JWD
CPU1Fan
SIMLP
IPMI
Slot6 PCI-E2.0 X8
SEPC
J11
VGA
CTRL
Clear CMOS
JBT1
Slot5 PCI-E X4
Battery
JI2C2
JI2C1
Slot4 PCI-E2.0 X8
Slot3 PCI-X 133MHZ
LAN
CTRL
Slot2 PCI-X 100/133MHZ
JPL1
Slot1 PCI-X 100/133MHZ
S I/O
Slot0 PCI-U
JK1
Pin#
1
3
5
7
PWR I2C Fan7
JPW1
JPW4
CPU2 Fan
JPP1
JPP0
CPU2
P2 DIMM1C
P2 DIMM1B
P2 DIMM1A
P2 DIMM2C
P2 DIMM2B
P2 DIMM2A
P2 DIMM3C
P2 DIMM3B
P2 DIMM3A
Intel 5520
(North Bridge)
SPI
JP5
JWOL1
Intel ICH10R
PXH
(South Bridge)
A
COM2
USB7
USB6
IPMB
TPM Header
JL1
2-26
Chassis Intrusion
Pin Defi nitions (JL1)
Pin#
Defi nition
1
Intrusion Input
2
Ground
T-SGPIO
Pin Defi nitions
Defi nition
Pin
Defi nition
NC
2
NC
Ground
4
Data
Load
6
Ground
Clock
8
NC
Note: NC= No Connections
A. Chassis Intrusion
JPW3
B. T-SGPIO-1
C. T-SGPIO-2
JF1
JP7
B
T-SGPIO1
C
T-SGPIO2
Fan4
JP3
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