Clock Stretching During Repeated Start Condition - Analog Devices ADSP-BF59x Blackfin Hardware Reference Manual

Functional Description

Clock Stretching During Repeated Start Condition

The repeated start feature in I
two subsequent transfers. With the use of clock stretching, the task of
managing transitions becomes simpler and becomes common to all trans-
fer types.
Once an initial TWI master transfer has completed (transmit or receive)
the clock will initiate a stretch during the repeated start phase between
transfers. Concurrent with this event the initial transfer will generate a
transfer complete interrupt (MCOMP) to signify the initial transfer has
completed (
DCNT
bit setting sequences or timings. The clock stretching logic described
above applies here. With no system related timing constraints the subse-
quent transfer (receive or transmit) is setup and activated. This sequence
can be repeated as many times as required to string a series of repeated
start transfers together. This is shown in
Table 12-7.
12-20
2
C protocol requires transitioning between
= 0). This initial transfer is handled without any special
ADSP-BF59x Blackfin Processor Hardware Reference
Figure 12-11 and described in