Portable Low-Power Architecture - Analog Devices ADSP-BF59x Blackfin Hardware Reference Manual

General Description of Processor
Table 1-1. Processor Features
Feature
Timer/Counters with PWM
SPORTs
SPIs
UART
Parallel Peripheral Interface
TWI
GPIOs
L1 Instruction SRAM
L1 Instruction ROM
L1 Data SRAM
L1 Scratchpad
L3 Boot ROM
Maximum Instruction Rate
Maximum System Clock Speed
Package Options
1 Maximum instruction rate is not available with every
possible SCLK selection.

Portable Low-Power Architecture

Blackfin processors provide world-class power management and perfor-
mance. They are produced with a low-power and low-voltage design
methodology and feature on-chip dynamic power management, which
provides the ability to vary both the voltage and frequency of operation to
significantly lower overall power consumption. This capability can result
in a substantial reduction in power consumption, compared with just
1-2
ADSP-BF592
3
2
2
1
1
1
32
32K
64K
32K
4K
4K
1 400 MHz
100 MHz
64-Lead
LFCSP
ADSP-BF59x Blackfin Processor Hardware Reference