Crt Auto Bias, Auto Bright, And Vertical Sync Delay Circuit Description - Ceronix 1493 Service Manual

CRT AUTO BIAS AND AUTO BRIGHT CIRCUIT DESCRIPTION.
The beam current feedback circuit uses a PNP video
transistor to direct most of the beam current to the
954
954
auto bias circuit while passing the voltage waveform,
from the video amplifiers to the CRT cathodes. Diode
and capacitor
958 958 956 956
distortion occurs. An additional benefit of this circuit is
that it protects the video amplifiers from the destructive
arc energy. Resistors
948 948
to CRT arcing, between the video amplifier transistors
and the beam current feedback transistor
beam current is filtered by capacitor
and is buffered by an operational amplifier, which
C10 C10
translates the beam current into a low impedance
voltage. This voltage is applied to a coupling capacitor
through a 200 ohm resistor
921
921
The 200 ohm and the 68.1K resistor
program value which sets the black level voltage via the
action of the program pulse.
Capacitor is used to stabilize the
922
922
transconductance amplifier which is used at the channel
input of the auto bias IC
the bias voltage of this channel in capacitor
21. This voltage is buffered by an internal amplifier,
with output at pin 20, which is connected to the Blue
video amplifier bias control input.
Resistor , , and
908 910
908 910
bright circuit. They are used to sum the bias voltage of
each of the three channels via a voltage node at the auto
bright amplifier, pin 9. The resulting output
920
920
voltage then controls the screen grid via transistor
Resistor protects the CRT grid from excessive
881 881
current during arcing. Capacitor
AC impedance to GND to insure that the CRT gain is
constant during each horizontal line. Resistor
defines the current gain of, and stabilizes, the auto
914 914
bright control loop.
The auto bias vertical sync comes from from a buffer circuit
for 15KHz operation. For 31KHz operation this signal is
generated by a delay counter. For both cases, the vertical
boost pulse is "and" connected with the Vertical Osc. O/S to
provide flicker free operation and laser beam protection. In
the case of vertical deflection failure, the loss of the boost signal
causes the auto bias vertical sync to stop, which stops the auto
bias function, and blanks the screen via the vertical blanking
circuit, thus providing for laser beam protection.
+12
Hfo=15KHz
6.8K
099
510Ω
PN2222
1
006
2
3 +12
100
V
P
62K
62K
098
099
4
0Ω
PN2222
100A
7
379
200K
0Ω
CS=.45"
CS=.74
383
389
200K
22K
384 201
GND
Filament
Retrace Boost
Vertical Osc. O/S, LA7851 pin 16
72
insure that no video waveform
and divide energy due
955 955
. The
954 954
and resistor
941
941
.
C8
C8
forms the
C3 C3
. The auto bias IC stores
927 927
at pin
895
895
are part of the auto
911
911
supplies a low
878 878
858
858
CRT AUTO BIAS, VERTICAL SYNC CIRCUIT DESCRIPTION.
CRT AUTO BIAS
VERTICAL SYNC
For Hfo=25-31KHz
1N4148
1N4148
006
1 CL Q1 12
1N4148
2 KL Q2 11
8,10,13 NC Q3 9
14 Vdd Q4 6
1N4148
7 Vss Q5 5
3 Q7 Q6 4
1N4148
CD4024
100
Autobias
.1uF
028
Delay
101 220pF
GND
091
Load resistor
the OP Amp.
transistor and OP Amp. from damage due to CRT
arcing.
PNP transistor
direct the grid pulse from the auto bias IC to G1. The
voltage on G1 is normally -15 to -27 volts depending on
which CRT is used. When the grid pulse at pin 11 is
low, the current from resistor
resistor
874
874
G1 line. Capacitor
protect transistor
The auto bias IC (CA3224E) is designed for a supply
voltage of +10V and since the video amplifier requires
+12V, three diodes
supply this IC. Resistors
divider which supplies the, auto bright, bias voltage to
the LM324
920
are identical to the red channel and are controlled by
the timing logic in the same way.
Refer to the waveforms at the bottom left of page 34
for the timing relationship. The vertical retrace boost
pulse, from the LA7838, (15KHz models) or the delayed
vertical sync pulse from the sync delay circuit (25 &
31KHz models) starts the 21 count auto bias state
counter. This pulse is applied to the auto bias IC
through resistor
pulse which is used to heat the filament also supplies
the horizontal sync to the auto bias IC via diode
. and resistor
850
850
between the 15 and 18 horizontal cycle and the program
pulse is active between the 18 and 21 horizontal cycle.
These two pulses in conjunction with the internal
and control of the transconductance amplifier output switch
are what establish the timing for the measurement and
setting of the video bias.
The vertical oscillator one shot (LA7851 pin 16)
supplies the start timing for the auto bias vertical
sync. This signal is conducted to the emitter of
by jumper
379
379
to the retrace boost pulse by resistor divider
and
384 384
produces a collector waveform which has the vertical
oscillator one shot timing and is dependent on the
retrace boost pulse.
For the 15KHz case, transistor
vertical oscillator one shot signal to produce the
CRT auto bias vertical sync signal. Resistor
is the pullup and resistor
chance of arc damage to the transistor.
For the 31KHz case, the vertical oscillator one
shot signal is directed to the clear of the 7 bit
2H Dly. counter
the autobias delay time out and come before the
024
bias active pulse from the CA3224E. When the
4H Dly.
clear is low, the counter counts horizontal pulses,
025
by the clock connected voltage divider
. When the counter outputs ones at each diode
8H Dly.
201 201
connected output, further counts are inhibited by
027
diode
006 006
16H Dly.
is also used for the CRT auto bias vertical sync.
15.8K
The delay is set to locate the grid pulse generated
381
3 faint lines at the top of the screen with full
vertical deflection. Capacitor
+24V
delay to avoid a race condition between the counter
clock and the auto bias horizontal sync.
eliminates crossover distortion from
909 909
. Resistor and
920 852
920 852
is used as a voltage translator to
928
928
is conducted to
933 933
and produces a 10 volt pulse on the minus
and resistors
871
871
from CRT arcing.
928 928
, , and
903 905 906
903 905 906
and
C4
C4
. The green and blue channel circuits
920
. The negative going flyback
891 891
. The grid pulse becomes active
888
888
. The base of
089
389
. Combining these signals in this way
reduces the
006
006
. This O/S time out must occur after
100 100
and pullup . This diode "or" signal
381 381
091 091
protects the
856
856
&
855 873
855 873
are used to
form a voltage
C7
C7
884
884
is connected
379
379
383 383
inverts the
100
100
099 099
and
099 099
produces a