Memory Ic (Earom) - Panasonic EURO 4 Chassis Technical Manual

3DQDVRQLF
Chapter 4
4. MEMORY I.C. (EAROM)
Together with the system data for the digital IC's,
customer data is also stored in the EAROM IC1103.
The stored data includes programme location data
such as channel, receiving range, standard, as well as
customer adjustment values for brightness, volume
and contrast.
The EAROM IC1103 has a memory capacity of 32768
bits organised into 4096 words, each of 8 bits. The
carrier storage time is equal to a minimum of ten years
whereby the read out operations are unlimited.
The read in and read out of data is controlled by the
microprocessor IC1101 and carried out via I
For this purpose the microprocessor IC1101
generates an 8 bit address word preceded by a start
bit. The 8 bit word is composed of a 7 bit word for the
address and 1 bit which contains the command for
reading out.
The address word is checked for compatibility with the
address contained in the IC and acknowledged by an
acknowledgement bit.
The memory location address is then transmitted by
the master I.C. (in this case the microprocessor). This
address also consists of an 8 bit word whose
reception is again confirmed by an acknowledgement
bit. If this is the case, the 8 data bits are then
transmitted to or from the memory I.C. and their
reception is confirmed by the relevant I.C. The
transmission described above is carried out by the
SDA line and synchronised with the clock in the SCL
line.
After the transmission of the final acknowledgement
2
bit, the memory process is initiated on the command
C- bus2.
'read in'. During the storage process, the memory
inputs SDA and SCL of EAROM IC1103 are latched in
order to eliminate any external influence on the
memory during this period.
After the switch on process, the system data is read
out from the memory via the I
microprocessor.
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EURO 4D Supplement
2
C BUS 2 by the