Panasonic EURO 4 Chassis Technical Manual page 63

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20.3. I S Bus Interface
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The standardised I S Bus interface allows, for
additional feature processors to be connected to the
MSP3410D IC2101, such as the surround processor
for Dolby Pro Logic Processing which is performed
by DPL3520 IC2401 located on the K-Board (ONLY
DOLBY MODELS).
The MSP3410D IC2101
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master on the I S interface. Here the clock and word
strobe lines are driven by the MSP3410D IC2101.
The MSP3410D IC2101
slave mode by software, which sees the lines being
input into the MSP IC2101
being synchronised to 576 times the I
(32kHz). However in this mode NICAM processing is
not possible.
2
The I S bus interface consists of five pins:
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1. I S_DA_IN1, I2S_DAIN2:
Allows input of 4 channels (2 channels per line,
2 x 16bits) per sampling cycle (32kHz) to be
transmitted.
2
2. I S_DA_OUT:
Allows for the output of 2 channels (2 x 16bits)
per sampling cycle (32kHz) to be transmitted
I 2 S Bus Timing Diagram
2
I
S_WS
Sony Mode
Philips Mode
2
I
S_CL
R LSB
L MSB
2
I
S_DAIN
R LSB
L MSB
2
I
S_DAOUT
normally serves as the
can also be switched to
and the master clock
2
S_WS rate
16 bit Left channel
16 bit Left channel
2
3. I S_CL:
Synchronises the transmission of I
(1.024MHz).
2
4. I S_WS:
2
The I S_WS word strobe line defines the data
being transmitted, either the left and right
sample.
2
The I S Bus has two possible modes of operation
which are described and shown in the timing
diagram below. However only the standard mode of
operation is used.
:
The standard mode: selects the Sony
format, here the I
the word boundaries, this change in the
word strobe signal being used to identify
whether the left or right channel sample is
being transmitted.
: The second mode: selects the Philips
format, here a change in the I
2
one I S_CL period before the word
boundaries. Again this change in the word
strobe signal being used to identify whether
the left or right channel sample is being
transmitted.
Sony Mode
Philips Mode
L LSB
R MSB
16 bit Right channel
L LSB
R MSB
16 bit Right channel
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3DQDVRQLF
2
S serial data
2
S_WS signal changes at
2
S_WS signal
R LSB
R LSB