Rtc Ram/Nmi Mask - Mitsubishi Electric LS Pro Hardware Technical Reference

RTC RAM/NMI mask

This port at I/O location 0070h controls the NMI mask and the index register for
accessing the RT/CMOS RAM. The bit significance is given below.
7 6 5 4
Bits 0-6
Bit 7
The RT/CMOS RAM has a data port at I/O location 0071h. the following table lists the
contents of the CMOS RAM.
Address
Real time clock data
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
Configuration data
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h-31h
32h-33h
34h-36h
37h
38h-3Eh
3Fh
Memory and I/O Usage
3 2 1 0
RT/CMOS RAM
NMI mask
These bits define the RT/CMOS RAM location to be accessed by the
following read/write operation to 0071h.
With this bit set to 1 Non-maskable interrupts (NMI) are enabled. With
this bit set to 0 NMI is disabled. A system reset sets this bit to 0.
Function
seconds
alarm seconds
minutes
alarm minutes
hours
alarm hours
day of week
date
month
year
status register A
status register B
status register C
status register D
Diagnostic status
Shut-down status
diskette drive
first hard disk drive
second hard disk drive
reserved
equipment installed
memory size in K (low byte)
memory size in K (high byte)
expanded memory size in K (low byte)
expanded memory size in K (high byte)
reserved
configuration CRC
reserved
date century
reserved
checksum
LS PRO HARDWARE TECHNICAL REFERENCE 5/9