Omron SYSMAC C20P Operation Manual page 174

Programming Instructions
Name
Mnemonic
Shift
I
Register
SFT(10)
P
R
Latching
Relay
KEEP(11)
Reversible
II
Counter
CNTR (12)
DI
R
Differentiate
Up
DIFU(13)
Differentiate
Down
DIFD(14)
High–speed
Timer
TIMH(15)
Word Shift
WSFT(16)
Compare
CMP(20)
Area
168
Bits/Words 0000 to 1807
Symbol
Creates a bit shift register from the starting
word (St) through the ending word (E). I:
input bit; P: shift pulse; R: reset input. St
SFT(10)
must be less than or equal to E and St and
St
E must be in the same data area.
E
15
Defines a bit (B) as a latch controlled by
set (S) and reset (R) inputs.
S
KEEP(11)
B
R
Increases or decreases PV by one when-
ever the increment input (II) or decrement
input (DI) signals, respectively, go from
CNTR(12)
OFF to ON. SV: 0 to 9999; R: reset input.
N
Must not access the same TC bit as anoth-
SV
er timer/counter. The TC bit is input as a
constant.
DIFU turns ON the designated bit (B) for
one scan on the rising edge of the input
DIFU(13)
B
signal; DIFD turns ON the bit for one scan
on the trailing edge.
DIFD(14)
B
A high-speed, ON-delay (decrementing)
timer. SV: 0.01 to 99.99 s; accuracy:
+0/–0.1 s. Must not be assigned the same
TIMH
TC bit as another timer or couter. The TC
SV
N
bit is input as a constant.
Left shifts data between starting (St) and
ending (E) words in word units, writing zer-
os into starting word. St must be less than
WSFT(16)
or equal to E and St and E must be in the
St
same data area.
E
Compares two sets of four–digit hexadeci-
mal data (Cp1 and Cp2) and outputs result
to GR, EQ, and LE.
CMP(20)
Cp1
Cp2
IR SR HR
1808 to 1907 HR 000 to 915
Function
0 15 0
IN
E St
TR TC
TR 0 to 7 TC 00 to 47
Appendix B
Operands
St/E:
IR
HR
AR
LR
B:
IR
HR
AR
LR
N: SV:
TC IR
SR
HR
AR
LR
DM
#
B:
IR
HR
AR
LR
N: SV:
TC IR
SR
HR
AR
LR
HR
#
St/E:
IR
HR
AR
LR
DM
Cp1/Cp2:
IR
SR
HR
AR
LR
TC
DM
#
DM #
DM 00 to DM 63 0000 to 9999
or 0000 to FFFF