Branching Instruction Lines - Omron SYSMAC C20P Operation Manual

The Ladder Diagram
AND Load
OR Load
4–3–4

Branching Instruction Lines

34
AND Load instruction logically ANDs the execution conditions produced by
two logic blocks. The OR Load instruction logically ORs the execution condi-
tions produced by two logic blocks.
Although simple in appearance, the diagram below requires an AND Load
instruction.
0000 0002
0001 0003
The two logic blocks are indicated by dotted lines. Studying this example
shows that an ON execution condition would be produced when both 1)
either of the conditions in the left logic block was ON (i.e., when either 0000
or 0001 was ON) and 2) either of the conditions in the right logic block was
ON (i.e., when either 0002 was ON or 0003 was OFF).
Analyzing the diagram in terms of instructions, the condition at 0000 would
be a Load instruction and the condition below it would be an OR instruction
between the status of 0000 and that of 0001. The condition at 0002 would be
another Load instruction and the condition below this would be an OR NOT
instruction, i.e., an OR between the status or 0002 and the inverse of the
status of 0003. To arrive at the execution condition for the instruction at the
right, the logical AND of the execution conditions resulting from these two
blocks would have to be taken. AND Load allows us to do this. AND Load
always takes an AND between the current execution condition and the last
unused execution condition. An unused execution condition is produced by
using the Load or Load NOT instruction for any but the first condition on an
instruction line.
Although we'll not describe it in detail, the following diagram would require an
OR Load instruction between the top logic block and the bottom logic block.
An ON execution condition would be produced for the instruction at the right
either when 0000 was ON and 0001 was OFF or when 0002 and 0003 were
both ON.
0000 0001
0002 0003
Naturally, some diagrams will require both AND Load and OR Load instruc-
tions.
When an instruction line branches into two or more lines, it is sometimes
necessary to use either interlocks or TR bits to maintain the execution condi-
tion that existed at a branching point. This is because instruction lines are
executed across to a terminal instruction on the right before returning to
branching points to execute instructions on the branch lines. If the execution
condition has changed during this time, the previous execution condition is
lost and proper execution will not be possible without some means of pre-
Section 4–3
Instruction
Instruction