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One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ)

FEATURES

Buffer memory board for capturing digital data used with
high speed ADC evaluation boards to simplify evaluation
32 kB FIFO depth at 133 MSPS (upgradable)
Measures performance with ADC Analyzer™
Real-time FFT and time domain analysis
Analyze SNR, SINAD, SFDR, and harmonics
Simple USB port interface (2.0)
Supporting ADCs with serial port interfaces (SPI)
On-board regulator circuit, no power supply required 6 V, 2 A
switching power supply included
Compatible with Windows 98 (2nd ed.), Windows 2000,
Windows ME, and Windows XP

EQUIPMENT NEEDED

Analog signal source and antialiasing filter
Low jitter clock source
High speed ADC evaluation board and ADC data sheet
PC running Windows 98 (2nd ed.), Windows 2000, Windows ME,
or Windows XP
Latest version of ADC Analyzer
USB 2.0 (USB 1.1-compatible) port recommended

GENERAL DESCRIPTION

The high speed ADC FIFO evaluation kit includes the latest
version of ADC Analyzer and a buffer memory board to capture
blocks of digital data from the Analog Devices, Inc., high speed
analog-to-digital converter (ADC) evaluation boards. The FIFO
board is connected to the PC through a USB port and is used with
ADC Analyzer to quickly evaluate the performance of high speed
ADCs. Users can view an FFT for a specific analog input and
encode rate to analyze SNR, SINAD, SFDR, and harmonic
information.
The evaluation kit is easy to set up. Additional equipment needed
includes an Analog Devices high speed ADC evaluation board,
a signal source, and a clock source. Once the kit is connected
and powered, the evaluation is enabled instantly on the PC.
The HSC-ADC-EVALB-DCZ can be used with single and multi-
channel ADCs and converters with demultiplexed digital outputs.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.

Evaluation Board User Guide

FUNCTIONAL BLOCK DIAGRAM

SINGLE OR DUAL
HIGH-SPEED ADC
EVALUATION BOARD
PS
FILTERED
ANALOG
INPUT

PRODUCT HIGHLIGHTS

1. Easy to Set Up. Connect the included power supply and
signal sources to the two evaluation boards. Then connect
to the PC and instantly evaluate the performance.
2. ADIsimADC™. ADC Analyzer supports virtual ADC
evaluation using Analog Devices proprietary behavioral
modeling technology. This allows rapid comparison between
multiple ADCs, with or without hardware evaluation boards.
For more information, see the AN-737 at www.analog.com.
3. USB Port Connection to PC. The PC interface is a USB 2.0
(1.1-compatible) connection. A USB cable is provided in the kit.
4. FIFO of 32 kB. The FIFO stores data from the ADC for processing.
A pin-compatible FIFO family is used for easy upgrading.
5. Up to 133 MSPS Encode Rate on Each Channel. Single-channel
ADCs with encode rates of up to 133 MSPS can be used with the
FIFO board. Multichannel and demultiplexed output ADCs can
also be used with the FIFO board with clock rates up to 266 MSPS.
6. Supports ADC with Serial Port Interface (SPI). Some ADCs
include a feature set that can be changed via the SPI. The FIFO
supports these features through the existing USB connection
to the computer without requiring additional cabling.
Rev. B | Page 1 of 24
STANDARD
USB 2.0
HSC-ADC-EVALB-DCZ
CHB FIFO,
REG
n
32k,
133MHz
TIMING
ADC
CIRCUIT
CHA FIFO,
n
32k,
CLOCK
133MHz
CIRCUIT
SPI
CLOCK INPUT
120-PIN CONNECTOR
Figure 1.
UG-173
PS
+3.0V
REG
USB
CTLR
SPI

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Summary of Contents for Analog Devices UG-173

  • Page 1: Features

    PC and instantly evaluate the performance. version of ADC Analyzer and a buffer memory board to capture blocks of digital data from the Analog Devices, Inc., high speed 2. ADIsimADC™. ADC Analyzer supports virtual ADC analog-to-digital converter (ADC) evaluation boards. The FIFO...
  • Page 2: Table Of Contents

    Added the Connecting to the HSC-ADC-AD922xFFA or Document Title Changed from HSC-ADC-EVALB to HSC-ADC-AD9283FFA Adapter Boards Section ......8 UG-173 ................. Universal Changes to the Connecting to the HSC-ADC-DEMUX Adapter Changed Connecting to the HSC-ADC-FPGA-8Z Section to Board Section ..................8 Connecting to the HSC-ADC-FIFO5-INTZ Section ....
  • Page 3: Quick Start Guide: Fifo Evaluation Board

    Web. Devices FIFO 4.1 is listed under the USB hardware. For the latest software updates, check the Analog Devices website at www.analog.com/FIFO. Apply power to the evaluation board and check the voltage levels at the board level.
  • Page 4: Quick Start Guide: Virtual Evaluation Using Adisimadc

    UG-173 Evaluation Board User Guide QUICK START GUIDE: VIRTUAL EVALUATION USING ADIsimADC In the ADC Modeling dialog box, click the Device tab and REQUIREMENTS then click … (Browse), which is the button adjacent to the • Complete installation of ADC Analyzer, Version 4.8.2 or later.
  • Page 5: Fifo 4.1 Data Capture Board Features

    Evaluation Board User Guide UG-173 FIFO 4.1 DATA CAPTURE BOARD FEATURES 6V SWITCHING IDT72V283 32k × POWER SUPPLY 16-BIT 133MHz FIFO CONNECTION TIMING ADJUSTMENT ON-BOARD +3.3V JUMPERS REGULATOR 120-PIN CONNECTOR (PARALLEL CMOS INPUTS) OPTIONAL POWER CONNECTION IDT72V283 32k × 16-BIT 133MHz FIFO...
  • Page 6: Fifo 4.1 Supported Adc Evaluation Boards

    UG-173 Evaluation Board User Guide 120-PIN CONNECTOR (PARALLEL CMOS INPUTS) TIMING ADJUSTMENT JUMPERS EPROM TO LOAD USB FIRMWARE DRIVER CIRCUIT FOR SERIAL PORT INTERFACE (SPI) LINES CYPRESS Fx2 HIGH SPEED OPTIONAL SERIAL USB 2.0 µCONTROLLER PORT INTERFACE (SPI) CONNECTOR Figure 3. FIFO Components (Bottom View) FIFO 4.1 SUPPORTED ADC EVALUATION BOARDS...
  • Page 7: Theory Of Operation

    Evaluation Board User Guide UG-173 THEORY OF OPERATION The FIFO evaluation board can be divided into several circuits, static input to each of the differential gates to a dc voltage of each of which plays an important part in acquiring digital data approximately 1.5 V.
  • Page 8: Clocking With Interleaved Data

    UG-173 Evaluation Board User Guide CLOCKING WITH INTERLEAVED DATA CONNECTING ADC EVALUATION BOARDS WITH DOUBLE ROW CONNECTORS ADCs with very high data rates can exceed the capability of a The HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC (FIFO 4) was single buffer memory channel (~133 MSPS). These converters the predecessor to the HSC-ADC-EVALB-DCZ (FIFO 4.1) and...
  • Page 9: Jumpers

    Evaluation Board User Guide UG-173 JUMPERS Use the information in Table 2 and Table 3 to configure the DEFAULT SETTINGS jumpers. On the FIFO evaluation board, Channel A is associated Table 4 lists the jumper settings to configure the data capture board with the bottom IDT FIFO chip, and Channel B is associated for use with single-channel, multichannel, and interleaving ADCs.
  • Page 10 UG-173 Evaluation Board User Guide Single-Channel Single-Channel Settings, Default Demultiplexed Dual-Channel Jumper Settings (Top) (Bottom) Settings Settings Description J503 Connect enable empty flag of top FIFO (U101) to USB MCU, 0 Ω resistor J504 Not applicable J505 Connect enable full flag of top FIFO (U101) to USB MCU, 0 Ω...
  • Page 11: Evaluation Board

    Evaluation Board User Guide UG-173 EVALUATION BOARD The FIFO provides all of the support circuitry required to accept to the PCB at J301. On the PC board, the 6 V supply is then fused two channels of an ADC’s digital parallel CMOS outputs. Each and conditioned before connecting to the low dropout 3.3 V...
  • Page 12: Fifo Schematics And Pcb Layout

    UG-173 Evaluation Board User Guide FIFO SCHEMATICS AND PCB LAYOUT PIN DEFINITIONS/ASSIGNMENTS HEAD-ON VIEW (TOP) CHANNEL B CHANNEL A SPI CONNECTIONS CONNECT ONLY DIGITAL DATA BIT CONNECTIONS BOTTOM TWO ROWS GROUND CONNECTIONS FOR ADCs THAT DO NOT SUPPORT SPI. CHANNEL B...
  • Page 13: Schematics

    Evaluation Board User Guide UG-173 SCHEMATICS ALLOW Fx2 TO CONTROL FIFO’S OUTPUT WIDTH PC2: TRISTATED, NORMAL 16-BIT DATAPATH PC2: DRIVEN HIGH, 9-BIT OUTPUT ALLOWS READING 18 BITS IN TWO READS. R101 R102 0Ω 10kΩ E101 WEN1 E102 D1_17 R108 D1_16...
  • Page 14 UG-173 Evaluation Board User Guide CMOS INPUTS TEST POINTS TEST POINTS PLACEMENT OF HEADER KEY HERE J104:3 J104:1 J104:2 D1_17 D1_17 D1_16 CLKB DUT_CLK1 D1_16 D1_15 D1_15 D1_14 D1_14 D1_13 D1_13 D1_12 D1_12 D1_11 D1_11 D1_10 D1_10 D1_9 D1_9 D1_8...
  • Page 15 Evaluation Board User Guide UG-173 R201 R202 0Ω 10kΩ E201 WEN2 E202 D2_17 D2_16 IDT72V283 TQFP 80 D2_15 BOTTOM FIFO CHANNEL A D2_14 D2_13 D2_12 D2_11 D2_10 D2_9 D2_8 U201 R203 WRT_CLK2 R204 C201 C202 C203 C204 C205 C206 C207 C208 0.1µF...
  • Page 16 UG-173 Evaluation Board User Guide Figure 11. PCB Schematic (Continued) Rev. B | Page 16 of 24...
  • Page 17 Evaluation Board User Guide UG-173 Figure 12. PCB Schematic (Continued) Rev. B | Page 17 of 24...
  • Page 18 UG-173 Evaluation Board User Guide Figure 13. PCB Schematic (Continued) Rev. B | Page 18 of 24...
  • Page 19: D1_17

    Evaluation Board User Guide UG-173 CONNECTIONS FOR 2M WORD EXTERNAL MEMORY C601 EXTERNAL MEMORY OVERRIDES ON-BOARD MEMORIES WHEN PLUGGED IN. ONLY A SIDE DATA. 0.1µF J601 U601 D1_8 RENEXT D1_9 D1_10 DC10 D1_11 DC11 D1_12 DC12 D1_13 DC13 D1_14 DC14...
  • Page 20: Pcb Layout

    UG-173 Evaluation Board User Guide PCB LAYOUT HSC-ADC-E VALB-DCZ Figure 15. Layer 1—Primary Side Figure 16. Layer 2—Ground Plane Rev. B | Page 20 of 24...
  • Page 21 Evaluation Board User Guide UG-173 Figure 17. Layer 3—Power Plane Figure 18. Layer 4—Secondary Side Rev. B | Page 21 of 24...
  • Page 22: Ordering Information

    UG-173 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 5. HSC-ADC-EVALB-DCZ Bill of Materials Item Reference Designation Device Package Description Manufacturer Mfg Part Number C101 to C109, C201 to C208, Capacitor Ceramic, 0.1 μF, 16 V, Panasonic ECJ0EB1A104K...
  • Page 23 Evaluation Board User Guide UG-173 Item Reference Designation Device Package Description Manufacturer Mfg Part Number R406, R409, R412, R415 Resistor 40.2 Ω, 1/16 W, 1% Panasonic ERJ-2RKF40R2X R502 Resistor 100 kΩ, 1/16 W, 1% Panasonic ERJ-2RKF1003X R504 to R507, R510, R511 to Resistor 24.9 Ω, 1/16 W, 1%...
  • Page 24: Changes To Related Links Section

    By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement.

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