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GB 22
5.
HFB X-RAY PROTECT
X-RAY PROTECT
EHT-INFO
HFB
I 2 C SLOW BUS
HIP
HOP
PICNIC
TUNER
NVM
MSP
FBX
PICNIC 3V3
PROTECTION
TUNER
TUNER 8V
PROTECTION
Figure 5-6
There are several types of protections:
•
I2C related protections (e.g. +5V supply check).
•
HOP related protections (mainly for deflection items).
•
Hardware errors which are not sensed by the Painter
(e.g. BRIDGE_PROT)
I2C related protections
In normal operation some registers of the I2C controlled IC's
will be refreshed every 200 msec. During this sequence the
I2C-busses and the I2C -IC's as well will be checked. The I2C
protection will take place if the SDA and SCL are whether
short-circuited to ground or to each other. An I2C error can
also occur, if the power supply of the IC is missing (e.g.
FBX_PROT; error 1).
HOP related protections
Every 200 msec. the status register of the HOP is read by the
Painter via I2C. If a protection signal is detected on one of the
inputs of the HOP, then the relevant error bit in the HOP
register is set to 'high'. If the error bit is still 'high' after 1 sec.,
the Painter will store the error code in the error buffer (NVM)
and depending on the relevancy of the error bit the set will
either go into the protection-mode or not.
•
HFB: Horizontal Flyback. If the horizontal flyback is not
present, then this is detected via the HOP (HFB_X-
RAY_PROT). One status bit is set to 'high'. The error
code is stored in the error buffer and the set will go into
the protection mode
•
Flash detection. From the EHT-info, via D6303 and
T7303 a flash will stop the H-drive and line output stage
immediately. The FLS-bit in the status register of the
HOP is set to 'high'. As the duration of a flash is very
short the FLS-bit will be reset to 'low' again after the flash
refresh, so via a slow start the set will be started again.
Hardware related protections
Due to the architecture (with 'hot' deflection) there are two
protections that are 'unknown' to the microprocessor, namely
the 'BRIDGE_PROT' (coming from the line stage) and the
'DEFL_PROT' protection (coming from the frame deflection
stage). If one of these protections is triggered, the set is
EM1A
Fault finding and repair tips
BCL
XPR (43)
HOP
FLS (5)
FLASH DETECT
NHF (13)
I 2 C
+5V2
PAINTER
I 2 C
I 2 C
CL 06532111_055.eps
121000
positioned in 'Standby'-mode. The Painter will now try to re-
start the set. If this will not succeed after 5 times (after ≈ 30 -
60 s.), the Painter will generate error 7 (this error can have
several causes, such as a Flash, BRIDGE_PROT,
DEFL_PROT or a serious mains dip). A blinking red LED will
be started.
5.8
Repair tips
5.8.1
General
RESET
73
IF NOT POR: ERROR 5 IS
GENERATED
PAINTER
7308
13
(OUT)
79
STANDBY INFO
(TEMPORARELY LOW THEN HIGH
LIKE STARTING A CAR)
7013
STANDBY-POR
MAIN SUPPLY
NON-VFB
BRIDGE-PROT
Figure 5-7
The start-up of the set is very different as of other sets (see
fig. 5-7 & 5-8):
1. When the set is switched 'ON', first the HOP is placed in
'low power start-up' mode (HOP-standby-mode). This
means that 5 V (derived from available Standby-supply)
is connected to pin 22 of the HOP-IC.
2. Now the HOP is driving the line-circuitry with 50 kHz
pulses. At the base of the line-transistor this is sensed via
the 'STANDBY'-line.
3. This signal triggers the Main supply to operate. Now the
line-stage has 'BAT'-voltage (141 V), it will also start.
4. After the 5 and 8 V-supply lines are sensed by the Painter
2
(via I
C), it will read the POR-bit from the HOP via the
I2C-bus.
5. Now the HOP is switched in 'ON'-mode and the set will
start-up further with normal drive (31.25 kHz for PAL).
6. The last step will be the unblanking of the picture.
So standby is not controlled via a standby-line from
microprocessor, but is achieved indirectly via the HOP-
circuitry.
COLD
POR-bit
2
I
C-bus
OUT
START/
HOP
STOP
22
7324
START/
STOP
29
44
5V STANDBY
CUT OFF
7306
STANDBY-POR
STANDBY
DEFL.
CL 06532111_056.eps
HOT
121000
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