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3-3.
System interrupt (lR-25) specification
The MZ-5500/5600 expansion slots have several interrupt request input lines,
and the 1R-25 is used for system expansion.
As it supports multiple
interrupts of eight levels, attention must be paid to the following points
when designing the interrupt cireuit.
i) Hardware
Sinc
e
the 8259A lnterrurt Controller issues the interrupt to the CPU with a
high state of an interrupt request input (low on the 1/0 slot), the interrupt
r
e
qu
e
st signal has to
be
r
e
tained until the CPU reeognizes the interrupt.
Th
e
r
e
for
e
, there
i
s a ne
e
d of using the deviee that ean elear the interrupt
r
e
qu
e
st by th
e
s
o
ftwa
re
or the software that elears it on the
1
/0 port.
As
As tll
e
IR-25 int
e
rr
oga
t
e
s multiple interrupt by a software polling, it
i
s so
dcs
i
g ne
d as to
de
t
cc
t
t~
e
device with the interrupt request on the
r/o
port.
a)
~~en
the interrupt elear and port output functions are hardware comprised.
tsv
IR-2S"
D
(.
'J1:
0,,-/)
~-~
J...-------t ;
NT
f)11
,0
Re.
1/0
deLc·
(e>.
:
fCDH )
AiDW(
b) When using the deviee that has the interrupt clear funetion.
o~
U:'I\:dbr
~~-------------;;~
D1t
1J
1
0,,15
;oRc
J!a
d~~c\~
(e;t0
1(0\4)
c) \.Jhen using the device that has the interrupt clear funetion and the
internal register interrupt request flag sensing funetion.
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