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SECTION TWO
Hardware Specifications
1. CPU peripheral
For the CPU of the MZ-5500 is used the 16-bit CPU (8086) which has
be~
me
the main trend and is driven by 5MHz clock.
On the other
h~nd,
the 8086-11
is adopted for the MZ-5600 which permits 8MHz/5MHz selection for driving
clock.
In the 5MHz mode, compatibility is obtained for the real time
processing for
applica~ions
developed on the MZ-5500.
Th
e
8086/8086-11 has
features
shown in Iable 1-1, and has two modes of
minimum and maximum allowing choice of pin configuration according to the
size of the system used.
lt consists of the execution unit (EU) and the bus
interface unit (BIU); the B1U manages 6-byte command queue and performs
address generation, and the EU interprets command function.
Each unit
operates in the async mode and enhances high throughput by the use of the
pipe line processing.
It is possible to directly access the memory up to
Uili,.
Using AO and BHE
lines of the 8086, da ta may be used as either 8-bit or 16-bit data.
Since the 8086/8086-11
,
is operated under the maximum mode for the
MZ-SSOO/5600, it requires the 8284 Clock Generator and tUe 8288 Bus
Controller in order to operate the 8086 as the CPU.
Not only the 8284
supplies the clock (4.9152HHz) to the 8086, but, it has the funetion to
'
synchronize the READY signal generated in the ready control circuit with the
clock to send it to the CPU.
Tlle 8288 is the bus controller/driver when the
8086 is operated in the maximum mode.
Command and control signals are
decoded from the status output, SO - S2, from the CPU to issue control
signal to the 1/0 device and the memory.
As a ccprocessor for a high speed numerical operation of the 8086, it
permits direct connection
of
the 8087 (MZ-5500), 8087-11 (MZ5600), and NDP
(option).
In terms of software,
it
can be assumed
,
as an expansion of the
8086/8086-11 cornrnand system.
AsTable 1-2 shows its execution speed, it
becomes 100 times [aster than operated with only the 8086/8086-11.
For key entry of the MZ-SSOO/5600, the
'
exclusive 80C49 subprocessor is used.
A kcy entry is transferred by means of interrupt only when there was a key
entry so that it decreases the burden to the 8086 and allows faster system
operation.
The 80C49 is also used for handling of the mouse data.
Iable 1-1
Features of 8086, 8086-11
(1) 16-bit microprocessor
(2) Rasic commands: 90
(3) Direct
acc~ssing
enabled
1MB memory space
(4) 14 x 16 bits register
(5) Arithmetical operation of signed or unsigned 8 or 16 bits data
including mu1tiplication and division
(6) SMHz, single clock (8086)/8HHz (8086-11)
(7) Maskable (INTR) and non-maskable (NM1) external interrupt input
(8) Dual mode operation (minimum/maximum)
(9) N-channel MOS
(JO) Single +5V supply
(11) 40-pin DIP
1'/
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