JVC RC-BM5 Service Manual page 28

RC-BM5
LS188 (IC703) : VCD decoder
1. Terminal layout
102
103
128
1
3. Pin function
Pin No. Symbol
1 to 3,22 EMI_A_9 to EMI_A_12
4 to 11 EMI_D_7 to EMI_D_0
12 to15 EMI_A_0 to EMI_A_3
16 VDD_IO_00
17,18,20,21 EMI_A_4 to EMI_A_7
19 VSS_IO_00
23,24 EMI_A_15 to EMI_A_16
25 EMI_A_18
26 I2C_CLK
27 I2C_DAT
28 VSS_OSC_0
29 XTLCLK_I
30 XTLCLK_O
31 VDD_OSC_0
32 TEST_H
33 RESET_L
34 HSYNC_L
35 VSYNC_L
36 CLK27_O
37 to 42 VDAT_7 to VDAT_2
43 VSS_CORE_00
44,45 VDAT_1 to VDAT_0
46 VDD_CORE_00
47 AUD_XCK
48 AUD_BCK
49 AUD_LRCK
50 AUD_DOUT
51 AUD_DIN
52 to 55 GPIO_23 to GPIO_20
56 VDD_IO_10
57,58 GPIO_19,GPIO_18
59 VSS_CORE_10
60,61 GPIO_17,GPIO_16
1-28
2. Block diagram
DRAM
DRAM
Interface
65
64
EMI
ROM/SRAM
Interface
Panel and
Prog.I/O
Interface
keypad
CD
Host/CD
39
Interface
Host
38
RISC
Processor
DSP
Core
I/O
O EMI address bus
I EMI data bus
O EMI address bus
- +3.3V
O EMI address bus
- +3.3V
O EMI address bus
O EMI address bus
O I2C clock
- I2C data
- GND
I Crystal input
O Crystal output
- +3.3V
I Test
I Hardware reset
I Horizontal sync
I Vertical sync
O CLK 27MHz output
O Luminance output
- GND
O Luminance output
- +2.5V
- External audio clock
O Audio bit clock
O Audio left/right clock
O Audio data output
I Audio data input
- Programmable I/O
- +3.3V
- Programmable I/O
- GND
- Programmable I/O
NTSC/PAL
Video
Processor
Encoder
On Screen
Display
Video
Decoder
Audio
Decoder
Audio
DAC
Audio
Interface
Audio
ADC
Register
Bank
Function