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SBA-7222G-T2 Blade Module User's Manual
Table A-4. Uncompressed Initialization Error Codes
Post Code Description
Preparing the descriptor tables next.
40h
The descriptor tables are prepared. Entering protected mode for the
42h
memory test next.
Entered protected mode. Enabling interrupts for diagnostics mode next.
43h
Interrupts enabled if the diagnostics switch is on. Initializing data to check
44h
memory wraparound at 0:0 next.
Data initialized. Checking for memory wraparound at 0:0 and finding the
45h
total system memory size next.
The memory wraparound test is done. Memory size calculation has been
46h
done. Writing patterns to test memory next.
The memory pattern has been written to extended memory. Writing
47h
patterns to the base 640 KB memory next.
Patterns written in base memory. Determining the amount of memory
48h
below 1 MB next.
The amount of memory below 1 MB has been found and verified.
49h
The amount of memory above 1 MB has been found and verified.
Checking for a soft reset and clearing the memory below 1 MB for the soft
4Bh
reset next. If this is a power on situation, going to checkpoint 4Eh next.
The memory below 1 MB has been cleared via a soft reset. Clearing the
4Ch
memory above 1 MB next.
The memory above 1 MB has been cleared via a soft reset. Saving the
4Dh
memory size next. Going to checkpoint 52h next.
The memory test started, but not as the result of a soft reset. Displaying
4Eh
the first 64 KB memory size next.
The memory size display has started. The display is updated during the
4Fh
memory test. Performing the sequential and random memory test next.
The memory below 1 MB has been tested and initialized. Adjusting the
50h
displayed memory size for relocation and shadowing next.
The memory size display was adjusted for relocation and shadowing.
51h
The memory above 1 MB has been tested and initialized. Saving the
52h
memory size information next.
The memory size information and the CPU registers are saved. Entering
53h
real mode next.
Shutdown was successful. The CPU is in real mode. Disabling the Gate
54h
A20 line, parity, and the NMI next.
The A20 address line, parity, and the NMI are disabled. Adjusting the
57h
memory size depending on relocation and shadowing next.
The memory size was adjusted for relocation and shadowing. Clearing
58h
the Hit <DEL> message next.
A-8
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