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Sharp ER-A750 Service Manual

For "u" & "a" version
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See also: Programming Manual , Installation Manual
CHAPTER 1.
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
CHAPTER 2.
OPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1
CHAPTER 3.
SERVICE PRECAUTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
CHAPTER 4.
SRV RESET (Program Loop Reset) and switch to SRV mode . . . . . . . . . . . . . .4-1
CHAPTER 5.
MASTER RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
CHAPTER 6.
DIAGNOSTICS
CHAPTER 7.
CIRCUIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-1
CHAPTER 8.
PWB LAYOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8-1
CHAPTER 9.
CIRCUIT DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-1
PARTS GUIDE
Parts marked with "!" is important for maintaining the safety of the set. Be sure to replace these parts with specified ones for
maintaining the safety and performance of the set.
SERVICE MANUAL
(For "U" & "A" version)
CONTENTS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-1
SHARP CORPORATION
CODE: 00ZERA750USME
ER-A750
MODEL
This document has been published to be
used for after sales service only. The con-
tents are subject to change without notice.

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Summary of Contents for Sharp ER-A750

  • Page 1 SERVICE MANUAL CODE: 00ZERA750USME ER-A750 MODEL (For "U" & "A" version) CONTENTS CHAPTER 1. SPECIFICATIONS ..........1-1 CHAPTER 2.
  • Page 2 SHARP product service centers. You may also contact your local recycling center for information on where to return the spent battery pack. SHARP’s involvement in this program is part of its commitment to protecting our environment and conserving natural resources.

  • Page 4: Chapter 1. Specifications

    CHAPTER 1. SPECIFICATION 3. Keyboard 1) Standard keyboard layout 1. Apearance LEVEL LEVEL LEVEL LEVEL LEVEL MISC FUNC External view TEX1 TEX2 AUTO MODE SHIFT SHIFT AUTO Front view SEND RFND RCPT SRVC NDSE FINAL Operator display SBTL PAST SBTL PLU/ TRAY VOID...
  • Page 5 KEY TOP DESCRIPTION KEY TOP DESCRIPTION SBTL Subtotal key SCALE Scale entry key CA/AT Cash / Amount tendered key 3) Text programming key sheet layout Speed tender key $5,$10,$20 (Used for AUTO8,9,and 10 key) PAGE UP Page up key PAGE DOWN Page down key <...
  • Page 6 3. Display 1) Operator display • Screen example 1 (REG mode) Time Mode name Merchandise subtotal excluding taxes Tax amounts Sales amount including taxes Server name Sentinel mark (X): Appears in the lower comer of the screen when the cash in drawer exceeds a programmed sentinel amount.
  • Page 7 Device type LCD display Dot format 320(W) 240(H) Full dot Dot size 0.33 0.33 mm Dot space 0.03 mm Dot color White Back color Dark blue Weight 180 g 2) Customer display Amount Machine state indicator lamps VOID RFND Lights up when a subtotal is displayed. Lights up when the change due amount appears in the dis- play or when the total sale amount is negative.
  • Page 8 2 – 1...

  • Page 9: Chapter 2. Options

    2. Options NAME MODEL DESCRIPTION ON-LINE SYSTEM ER-A7RS 2 port RS232 I/F MCR I/F EXPANSION ER-03MB 1MB PS-RAM MEMORY BOARD ER-04MB 2MB PS-RAM REMOTE PRINTER ER-03RP ER-04RP ER-A8MR (Magnet Card Reader) DATA BACK UP ER-02FD FD unit SYSTEM CE-IR2 Wireless I/F for IR comunication CE-IR4 3.
  • Page 10 Test pins : Used to check the bus signals. 5-2. MCR test card: UKOG-6718RCZZ • Used when executing the diagnostics of the ER-A8MR. Bus connector : Used to check the bus signals. • External view Connected to the ER-A750 Mother PWB. 2 – 3...

  • Page 11: Chapter 3. Service Precaution

    2 ER-A750 ........
  • Page 12 1) Background Fig. 10 Waveform at IC34 (pin 1 of the 75115 IC in the receiver The ER-A750 can use the ER-03MB or the ER-04MB as an optional terminal) RAM PWB. The ER-03MB and the ER-04MB are available in two...
  • Page 13 ER-A750 (Fig. 2). Before installing an optional RAM PWB, check its version by referring to the description given in the above-mentioned (1) and (2) and set the jumper as shown below. (The ER-A750 has been factory-set for 150ns access time and TP cycle inserted.) MAIN PWB Imprint "...
  • Page 14 The service part flash ROM does not include the application software in it. The ER-A750 has been factory-set so that the JP1 is in the setting state (1) (TP cycle inserted). However, if it has neither the ER-03MB •...
  • Page 15 1. PC+CE-IR4 system PC with IR ER-A750 2. PC only system (2) Procedures on the PC side and on the ER-A750 side are as follows: Procedure on P.C. side Procedure on ER-A750 side Copy “A7IPL.EXE” and S-type ROM object file (ex.
  • Page 16 Operation: > A7IPL A750_0A.ROM (“A750_0A.ROM” is file name of S-type ROM object.) Program data is sent to ER-A750 automatically. Program data is received from P.C. automatically. IPL from IR Connected IRDA 115200 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF “A7IPL.EXE”...
  • Page 17 SRV mode PROCEDURE In the ER-A750, the following reset switch (location No.: S2) is used 1) Turn off the AC switch. to switch to the service (SRV) mode and to reset. 2) Set the reset switch to “OFF” position 3) Turn on the AC switch.

  • Page 18: All Memory Clear

    5) Enter the password key operation CHAPTER 5. MASTER RESET DISPLAY: (All Memory Clear) ENTER PASSWORD There are two possible methods to perform a master reset. Password input procedure: Press the four corners of the key- board in the sequence of a, b, c, and MRS-1 (Master resetting 1) Used to clear all memory contents and return machine back to its initial settings.
  • Page 19 6) Set the fixed keys in the table below. (Start from the zero “0” key, MRS-2 (Master resetting 2) The keys are displayed sequentially.) Used to clear all memory and keyboard contents. This reset returns DISPLAY: all programming back to defaults. ENTER 0 The keyboard must be entered by hand.

  • Page 20: Table Of Contents

    CHAPTER 6. DIAGNOSTICS 1. General SPECIFICATIONS This diagnostics program is used for simplified check of the ER-A750 series operations in servicing. The diagnostics program is built in the standard ROM. CONTENTS 1. General ..................1 2. System configuration ..............1 2. System configuration 2-1.

  • Page 21: Ram Diagnostics

    2 Display ER-A750 Diagnostics V 1.0A Standard RAM Check Product§&§Test§Diagnostics RAM Diagnostics Standard memory size : 512KB PASS!!(or ERROR!!) ROM & SSP Diagnostics Clock & Keyboard & Clerk Diagnostics Error Address xxxxxxH Serial I/O Diagnostics Write Data xxxxH LCD Diagnostics...

  • Page 22: Er-03Mb Check

    3) ER-03MB Check 4) ER-04MB Check 1 Check content 1 Check content The ER-03MB presence check is performed in the following pro- The ER-04MB presence check is performed in the following pro- cedure. The memory contents will not be changed by this check. cedure.

  • Page 23: Rom & Ssp Diagnostics

    The format of diagnostics program is executed. data (ASCII) to be stored is as follows: ROM & SSP Check DFFFE0H DFFFEFH: Model name code (example: ER-A750. Display is made up to 00H of data.) Standard§ROM§Check DFFFF0H DFFFF9H: 27801R****(****=PROGRAM VERSION)

  • Page 24: Timer & Keyboard & Clerk Switch Diagnostics

    RS232 I/F PWB are compared. 1 Check content Since the RS232 on the main PWB of the ER-A750 is fixed to The operation of the clock crystal of CKDC7 is checked. CH1 and CH2, that in the ER-A7RS must be set to CH3 CH7.

  • Page 25: Ch1 Check

    ER-A7RS CON3 2 Display S1-4 S1-5 S1-6 CHANNEL RS232 CH1 Check Invalid ER-DR ERROR!! CHANNEL 1: Impossible to set CHANNEL 2: Impossible to set All the contents of an error must be displayed. CHANNEL 3 CHANNEL 4 ERROR ERROR display ERROR content CHANNEL 5 CHANNEL 6...

  • Page 26: Liquid Crystal Display Diagnostics

    • Reversed pattern of the above 3-6. Liquid Crystal Display Diagnostics The ER-A750 LCD display is checked. The test program displays the patterns in the following sequence. Every time when the ENTER key is pressed, the next pattern is displayed. When the ENTER key is pressed at the final pattern, or when the CANCEL key is pressed at the midst of the check, the display returns to the menu screen.

  • Page 27: Sharp Retail Network Diagnostics

    Press the CANCEL key to turn off all the elements of the rear Power interruption ON continuation Host Controller display. Power interruption process complete Host Controller 3-8. SHARP Retail Network Diagnostics CH1 reception data present. Host Controller CH2 reception data present. Host Controller The SRN test is performed.

  • Page 28: Srn Flag Send Check

    • 2) SRN Flag Send Check Master machine setting 1 Check content In the menu screen, select "Data Transmission Check (Master Machine)." The display is as shown below. Execute diagnostics 3 command to send Flag (7EH) continuously. 2 Display Data Transmission Check (Master) SRN Flag Send Check Input Master Terminal Number Enter the terminal No.

  • Page 29: Irda & Ask Diagnostics

    The above operation is repeated. 1) IrDA & ASK Check IR communication is checked between the ER-A750 sending unit and 3 Error display the receiving unit. Data Transmission Check (Master) 1 Check content • Data transmission is made from the machine to be checked in Input Master Terminal Number ASK format.

  • Page 30: Data Transmission Check (Send Mode)

    1 Check content This diagnostics is used to check the drawer open and sensors. Continuous IR communication between the ER-A750 and the ER- The following menu is displayed. The cursor position is highlighted. A750. This mode is on the transmission side. When data of 256byte key and key to move the cursor.

  • Page 31: Chapter 7. Circuit Description

    CHAPTER 7. CIRCUIT DESCRIPTION 1. Hardware block diagram Drawer x 2 DRIVER +24V H8/510 DRIVER +24V FLASH (ROM) MPCA7 USART RS232 x 2 & DRIVER/ PSEUDO RECEIVER SRAM 512KB OPC1 EXT.SLOT (80pin x 2) RAMCN (50pin) VRAM (SRAM LCD CONTROLLER CKDC7 32K) CUSTOMER DISP.
  • Page 32 2. Description of main LSI’s 2-1. CPU (HD6415108FX)
  • Page 33 2) Block diagram P27/A23 P26/A22 Data bus Port 1 P25/A21 P24/A20 P23/A19 P22/A18 P21/A17 P20/A16 EXTAL XTAL Clock Watch oscillator dog timer H8/500 CPU STBY Interruption controller 16bit free running Refresh controller timer x 2ch RFSH BREQ BACK Wait state 8bit timer controller WAIT...
  • Page 34 3) Pin description Signal Signal Symbol Function Symbol Function name name RESET I/O Reset input 55 VCC In +5V Non-maskable interrupt input for 56 P40 In +5V SSP interrupt input. 57 P41 In GND In GND 58 P42 In GND IPLON signal for factory setting 59 P43 In GND...
  • Page 35 2-2. G.A (MPCA7) Signal Symbol Function name 1) Pin configuration 111 MD2 In GND 112 STBY STBY In +5V (Nu) EXINT0 EXINT1 PCUT EXINT2 FCUT EXINT3 STAMP RA15 SLRS RA16 SLPMTD RA17 RA18 EXWAIT INT0 WAIT INT1 MCR2 HTS1 MCR1 SCK1 DAX2 STH1...
  • Page 36 2) Block diagram A23~A0 IRLON ROS1 ROS2 Address decode RASEL RAS1 SSPRQ SSP comparison register Image External CS BAR. RAS2 control Internal CS RAS3 OPTCS IRTX IRRX I/R Control D0~D7 ASKRX Buffer TXDI SCKI RXDI HTS1 Multiplexer SCK1 serial select STH1 HTS2 SCK2...
  • Page 37 3) Pin description Signal Signal Symbol Function Symbol Function name name — Serial port shift clock input SCK1 SCK1 from CPU — IRQ0 IRQ0 Out Interrput request to CPU PCUT — Address bus FCUT — Address bus — Address bus STAMP —...
  • Page 38 Signal Signal Symbol Function Symbol Function name name 108 WAIT WAIT Out Wait request signal 159 DOTEN — External wait control input Standard RAM chip select 109 EXWAIT EXWAIT 160 RASP RASP signal signal 110 RA18 — 111 RA17 — 112 VSS —...
  • Page 39 One chip of the OPC1 is equipped with four communication circuits. (Three of them are for RS-232 only: UNIT 0 ~ 2, one is for selection of simple IRC/RS-232: UNIT 3) The ER-A750 uses UNIT0 (RS-232 interface) and UNIT7 (RS-232 inter- face). UNIT NO.
  • Page 40 3) Block diagram TO/FROM USART TCR0 Inline cont Data bus buffer Timer0 control RCVDT0 Timer0 TCR1 Read/write Timer1 control RCVDT1 control Timer1 TCR2 Decorder control Timer2 control RCVDT2 Timer2 SL00 SL01 TCR3 SL02 SL10 SL11 Timer3 control SL12 RCVDT3 CHSL SL20 SL21 SL22...
  • Page 41 4) Pin description OPC1 pin table The signals marked with "-" at the end are LOW active signals. Example: "CS1-" = "CS1" Pin No. Pin name ER-A750 Description SL00 RS-232/UNIT0 channel select SL01 SL02 SL10 RS-232/UNIT1 channel select SL11 SL12...
  • Page 42 Pin No. Pin name ER-A750 Description TRQ1- TRQ1 TIMER IRQ signal (RS-232) TRQ2- TIMER IRQ signal (INLINE) DATA BUS (MAIN) DATA BUS (USART) ADDRESS BUS (MAIN) OPTCS- OPTCS- OPTION CHIP SELECT (from MPCA7) RDO- RDO- READ signal (from MPCA7) WRO-...
  • Page 43 Operations in the advancement synchronization mode 2-4. USART (MB89371A) • Detection of framing error, overrun error, parity error 1) General • Transmission/reception buffer state acknowledgment The MB89371A (Serial data transmitter/receiver, 2 units) is a versa- tile-use interface LSI for communication lines, which is equipped •...
  • Page 44 4) Pin description Pin No. Pin name ER-A750 Data bus RCVDT1 RCVDT1 RS-232 reception data signal RCVDT2 RCVDT2 – TRNCLK1- Data transmission clock TRNCLK2- Write signal CS1- CS1- RS-232 chip select CS2- CS2- RSLCT0 Address bus RSLCT1 Read signal RCVRDY1...
  • Page 45 2-5. Z80 CPU 2) Pin configuration 1) Features The extensive instruction set contains 158 instructions, including the 8080A instruction set as a subset. • NMOS version for low cost high performance solutions, CMOS version for high performance low power designs. •...
  • Page 46 4) Pin description 2-6. Z80 CTC 1) Features Signal Symbol In/Out Function name • Four independently programmable counter/timer channels, each Clock with a readable downcounter and a selectable 16 or 256 pre- scaler. Downcounters are reloaded automatically at zero count. S D4 In/Out Data bus •...
  • Page 47 3) Pin configuration 5) Pin description Signal Symbol In/Out Function name S D0 In/Out Data bus S D1 In/Out Data bus S D2 In/Out Data bus S D3 In/Out Data bus IORQ — CLK/TRG3 — CLK/TRG2 ZC/TO2 ZC/TO1 — CMOS S D4 In/Out Data bus Z80 CTC...
  • Page 48 3) Pin configuration 2-7. PD71037 Signal DMA CONTROLLER Symbol In/Out Function name The PD71037 is a direct memory access controller (DMAC) for the READY READY Ready signal micro processor system. It provides higher processing speed and HLDAK HLDAK Hold acknowledge signal lower power consumption in comparison with those in conventional ASTB S ASTB...
  • Page 49 SUB CPU address SUB CPU address I/O address & RD, WR in the SRN (SHARP Retail Network), its main function is to decoding unit communicate data with the host CPU and control the peripheral CPU & DMAC wait circuits and transmission control circuits of the Sub CPU (Z-80). Fig.
  • Page 50 3) Terminal Name and Description (MB62H149) Terminal Host/ Description name Host Reset IO/WR I/O write 23.9 ± 0. 6 IO/RD I/O read Address enable from DMAC Address strobe from DMAC Terminal count DAK23 DMA acknowledge 2+3 DRQRS DMA request read to sub DRQWS DMA request write to sub Host...
  • Page 51 2-9. SED1351FOA/LB The SED1351FOA/LB is a display controller that is used for the high-duty dot matrix type LCD for graphic display. This unit can interface with an 8-bit or 16-bit MPU with the READY (WAIT) input terminal. Access to the VRAM is performed by the cycle steal method so that distortion of the screen is minimal.
  • Page 52 2) Block diagram RESET READY MPUSEL,MPUCLK IOCS,IOWR,IORD CONTROL REGISTER LCDENB MEMCS,MEMWR,MEMRD CONTROL CIRCUIT XSCL AB0~AB15 DISPLAY ADDRESS BUFFER TIMING CONTROL CIRCUIT DB0~DB15 DATA BUFFER 16bit REFRESH VRAM DISPLAY DATA BASIC TIMING ADDRESS CONTROL UD0~UD3 CONTROL COUNTER GENERATING CIRCUIT CIRCUIT LD0~LD3 CIRCUIT OSCILLATION CIRCUIT...
  • Page 53 4) Pin description Signal Symbol In/Out Function name Signal Symbol In/Out Function VRAM address bus name VRAM address bus — VRAM address bus — VRAM address bus Chip select signal for control IOCS LCDC VRAM address bus register VA10 VA10 VRAM address bus Write strobe signal for control IOWR...
  • Page 54 1) General description DDIG — — The CKDC7 is a 4-bit microcomputer developed for the ER-A750 and provides functions to control the real-time clock, keys, and displays. — The basic functions of the CKDC7 are shown below. Clock signal...
  • Page 55 3 Achieving high-speed accessing, and accessing by abbreviated • instructions. • * In the ER-A750, the low-order 32 KB of the RASP space (180000h • Extended I/O area 1FFFFFh) is mapped (With the MPCA7’s internal registers RASPE=1 and RASEL=0, the address line MA15 should be *The low-order 32 KB of the ROM area and the low used.)
  • Page 56 3-4. ROM space The addresses from 00FE80h to 00FF7Fh are called the internal I/O Fig.5 shows the ROM space. The ER-A750 uses 1MB of NOR-type area, while those from 00FF80h to 00FFFFh the external I/O area. flash memory instead of conventional ROM, so that the ROS1 and...
  • Page 57 4. LCD display The main display is a 320 240 dot liquid crystal display. The display controller is capable of performing cycle steal actions (dis-cussed later), thus achieving high-speed display. 4-2. LCD panel The LCD panel is the model LM320153 dot-matrix liquid crystal unit, which is a blue-mode transmission type with a CCFT back light.

  • Page 58: Customer Display

    HWR- VRAM H8/510 74LVX00 RESET TC51V The ER-A750 uses flash memory in the place of EPROM, so it is 74F32 VRAM 8512AFT possible to rewrite the contents of the flash memory in changing the 74F08 program. However, since the existing gate array MPCA7 is used, it is...
  • Page 59 Table 9 9. Interrupt control <IRQ0 component bits – 1> There are roughly two types of interrupts: Address BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 • Internal interrupts: Controlled inside the CPU 00FF80h POFF EXINT3 EXINT2 EXINT1 • External interrupts: Input into the CPU from outside (S17) (S16)

  • Page 60: Block Diagram

    The ER-03/04 have been originally designed for use in the ER-A850. Therefore, when using the RAM expansion bus of the same construc- RESET tion for the ER-A750, the two following points on the interface need to be considered. 1 Output address change Fig.
  • Page 61 1 Output address change 13-2. Terminal table The ER-A750 uses the expansion RAM board at the RAS3 area and The terminal table of the RAM connector is shown below. its high-order IMB space (200000h 3FFFFFh). Table 17 Basically, the ER-03MB is supposed to be used in the area from <Expansion RAM connector terminal table>...
  • Page 62 14. I/O expansion bus specifications 15. Reset sequence The table below shows the standard bus for expanding optional The reset sequence block diagram is shown below. Note that RESET devices signal (system reset) and CKDCR signal (CKDC reset) are different from each other.
  • Page 63 16-1. Drawer solenoid drive in the ER-A750, MRS, SRV resetting is selected and executed by the key which has bee depressed when the CKDC reset is released to P37 inside the CPU are allocated for the port output of the start the system.

  • Page 64: Rewriting Flash Memory

    3. During IPL 17. Rewriting flash memory Typical procedure for rewriting flash memory Below are the memory maps at the time of normal operation, ship- When IPLON1 = "L" is detected at starting, the IPL routine is written ping from the factory and IPL. into the PSRAM as shown in the figure below, and the IPL routine is 1.
  • Page 65 Two standard RS232 channels are compatible with the ER-A5RS. However, while the ER-A5RS uses the IRQ2 terminal of the CPU for interruption of the RS232, the ER-A750 cannot use the IRQ1 terminal instead of it. (The IRQ2 terminal is used for IR as the SCK1 terminal.)

  • Page 66: Chapter 8. Pwb Layout

    CHAPTER 8. PWB LAYOUT 1. Main PWB (Side-A) 8 – 1...
  • Page 67 2. Main PWB (Side-B) 8 – 2...
  • Page 68 3. Mother PWB (Side-A) 4. CKDC PWB 8 – 3...
  • Page 69 5. Rear display PWB 6. Invator PWB 7. Noise filter PWB 8 – 4...
  • Page 92 PARTS GUIDE ER-A750 MODEL (For “U” & “A” version) CONTENTS 1 Top cabinet etc. 6 CKDC PWB unit 2 Bottom cabinet etc. 7 N/F PWB unit 3 Packing material&Accessories 8 Inverter PWB unit 4 Main PWB unit 9 Rear display PWB unit...

  • Page 93: Top Cabinet Etc

    ER-A750 1 Top cabinet etc. PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 1 G C O V A 7 0 8 0 B H S A LCD cover A 2 G C O V B 7 0 8 1 B H Z Z...
  • Page 94 ER-A750 1 Top cabinet etc. RCPS0150 – 2 –...

  • Page 95: Bottom Cabinet Etc

    ER-A750 2 Bottom cabinet etc. PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 1 L A N G K 7 5 6 4 B H Z Z Option angle 1 2 X H B S D 3 0 P 0 4 0 0 0...
  • Page 96 ER-A750 2 Bottom cabinet etc. RCPS0151 – 4 –...

  • Page 97: Packing Material&Accessories

    ER-A750 3 Packing material&Accessories PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 1 S P A K A 8 3 7 7 B H Z L Packing add L 2 S S A K H 0 0 0 3 D H Z Z...

  • Page 98: Main Pwb Unit

    ER-A750 4 Main PWB unit PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 1 R C R M Z 1 0 1 6 L C Z Z Crystal (16MHz) [X4] 2 V C E A P S 1 C C 1 0 6 M...
  • Page 99 ER-A750 4 Main PWB unit PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 74 V R S - T S 2 A D 1 6 2 J Resistor (1/10W 1.6K [R296,297] 75 V R S - T S 2 A D 1 8 3 J...

  • Page 100: Mother Pwb Unit

    ER-A750 4 Main PWB unit PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 154 L X - B Z 6 7 8 2 B H Z Z Screw (3 8KS) [IC40] (Unit) 901 C P W B X 7 5 1 0 B H 0 1...

  • Page 101: F Pwb Unit

    ER-A750 7 N/F PWB unit PRICE PART PARTS CODE DESCRIPTION RANK MARK RANK 1 V R D - R B 2 H Y 3 9 4 J Resistor (1/2W 390K [R1] 2 Q C N C W 7 1 9 9 B H 0 E...

  • Page 102: Index

    ER-A750 Index PRICE PART PRICE PART PARTS CODE PARTS CODE RANK MARK RANK RANK MARK RANK CKOG-6724BHZZ QACCD8411BHZZ CPWBF7508BH01 QCNCM1060AC03 4- 113 " 7- 901 QCNCM5091BC1B CPWBF7513BH01 QCNCM5278NCZZ 4- 114 " 9- 901 QCNCM7125BH0I 4- 115 CPWBN7511BH01 QCNCM7128BH1E 4- 116 "...
  • Page 103 ER-A750 PRICE PART PRICE PART PARTS CODE PARTS CODE RANK MARK RANK RANK MARK RANK RVR-B2410QCZZ 4- 135 VHIGL339AD/-1 RVR-M2415QCN3 4- 136 " VHIG76C256F70 SPAKA8377BHZL VHIH4728A96FS SPAKA8377BHZR VHIH641510810 SPAKA8384BHZZ VHIIR9393N/-1 SPAKC8378BHZZ VHIKIA7806P-1 4- 142 SPAKC8379BHZZ VHILHF80S01-1 SSAKH0003DHZZ VHILT1184CS-1 SSAKH3015CCZZ VHILZ9AH39/-1...
  • Page 104 ER-A750 PRICE PART PRICE PART PARTS CODE PARTS CODE RANK MARK RANK RANK MARK RANK VRS-TS2AD432J " VRS-TS2AD470J VRS-TS2AD472J " " VRS-TS2AD473J " VRS-TS2AD512F VRS-TS2AD513J " VRS-TS2AD561J VRS-TS2AD562J " VRS-TS2AD563J VRS-TS2AD622J " VRS-TS2AD682F VRS-TS2AD751J VRS-TS2AD752F VRS-TS2AD8R2J VRS-TS2AD822G VRS-TS2HD470J VSDTA144EK/-1 VSDTC114YK/-1 "...
  • Page 105 COPYRIGHT 1997 BY SHARP CORPORATION All right reserved. Printed in the USA. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without prior written permission of the publisher.

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