Write Dma Queued (Cch); Figure 156. Write Dma Queued Command (Cch) - IBM IC35L040AVVN07-0 - 40GB IDE Deskstar 120GXP 7200RPM UATA-100 07N9682 Specifications

11.38 Write DMA Queued (CCh)

Command Block Output
Registers
Register
Data
Feature
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Command
Error Register
7 6 5
CRC UNC 0
V 0 0

Figure 156. Write DMA Queued Command (CCh)

This command executes in a similar manner to a WRITE DMA command. The device may perform a bus
release or it may execute the data transfer without performing a bus release if the data is ready to be
transferred.
If the device performs a bus release, the host shall reselect the device using the SERVICE command.
When the data transfer has begun, the device does not perform a bus release until the entire data transfer
has been completed.
Output parameters to the device
Feature
Sector Count
Sector Number
Cylinder High/Low
H
7 6 5 4 3 2 1 0
- - - - - - - -
V V V V V V V V
V V V V V V V V
V V V V V V V V
V V V V V V V V
V V V V V V V V
1 L 1 D H H H H
1 1 0 0 1 1 0 0
4 3 2 1
IDN 0 ABT T0N AMN
V 0 V 0
Number of sectors to be transferred. A value of 00h indicates that 256 sectors are
to be transferred.
Bits 7 - 3 (Tag) contain the Tag for the command being delivered.
Starting sector number or LBA address bits 7 - 0.
Starting cylinder number or LBA address bits 23 - 8.
Starting head number or LBA address bits 27 - 24.
Deskstar 120GXP hard disk drive specifications
Command Block Input
Register
Data
Error
Sector Count
Sector Number
Cylinder Low
Cylinder High
Device/Head
Status
Status Register
0 7 6 5
BSY RDY DF
V 0 V 0
184
Registers
7 6 5 4 3 2 1 0
- - - - - - - -
see below
V V V V V V V V
V V V V V V V V
V V V V V V V V
V V V V V V V V
- - - - H H H H
see below
4 3 2 1
SRV DRQ COR IDX ERR
V – 0 –
0
V