Figure 33. Ultra Dma Cycle Timing Chart (Device Terminating Read); Figure 34. Ultra Dma Cycle Timings (Device Terminating Read); Device Terminating Read Dma - IBM IC35L040AVVN07-0 - 40GB IDE Deskstar 120GXP 7200RPM UATA-100 07N9682 Specifications

6.2.4.4 Device Terminating Read DMA

DMARQ
DMACK-
STOP
HDMARDY-
DSTROBE
DD(15:00)
Device drives DD

Figure 33. Ultra DMA cycle timing chart (Device terminating Read)

PARAMETER DESCRIPTION
(all values in ns)
Time from DSTROBE edge to
tSS
negation of DMARQ
tLI Limited interlock time
Maximum time allowed for
tAZ
output drivers to release
Minimum delay time required
tZAH
for output
tMLI Interlock time with minimum
CRC word setup time (at device
tCS
side)
CRC word hold time (at device
tCH
side)
tACK Hold time after DMACK–
Maximum time before releasing
tIORDYZ
IORDY

Figure 34. Ultra DMA cycle timings (Device Terminating Read)

tSS
tLI
tLI
tLI
tAZ
xxxxx
tZAH
MODE0
MIN MAX
50 –
0 150
– 10
20 –
20 –
15 –
5 –
20 –
– 20
Deskstar 120GXP hard disk drive specifications
tMLI
tCS
xxxxxxxxxxxxxxxxxx
Host drives DD
MODE1 MODE2
MIN MAX MIN MAX MIN
50 – 50 –
0 150 0 150
– 10 – 10
20 – 20 –
20 – 20 –
10 – 7 –
5 – 5 –
20 – 20 –
– 20 – 20
33
tACK
tACK
tIORDYZ
tCH
xxxxxxxxxx
CRC
MODE3 MODE4 MODE5
MAX MIN MAX MIN
50 – 50 – 50
0 100 0 100 0
– 10 – 10 –
20 – 20 – 20
20 – 20 – 20
7 – 5 – 5
5 – 5 – 5
20 – 20 – 20
– 20 – 20 –
MAX
–
75
10
–
–
–
–
–
20