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BJ50.
Perfmon Event LD_BLOCKS.STORE_FORWARD May Overcount
Problem:
Perfmon LD_BLOCKS.STORE_FORWARD (event 3H, umask 01H) may overcount in the
cases of 4KB address aliasing and in some cases of blocked 32-byte AVX load
operations. 4KB address aliasing happens when unrelated load and store that have
different physical addresses appear to overlap due to partial address check done on the
lower 12 bits of the address. In some cases, such memory aliasing can cause load
execution to be significantly delayed. Blocked AVX load operations refer to 32-byte AVX
loads that are blocked due to address conflict with an older store.
Implication:
The perfmon event LD_BLOCKS.STORE_FORWARD may overcount for these cases.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ51.
Conflict Between Processor Graphics Internal Message Cycles And
Graphics Reads From Certain Physical Memory Ranges May Cause a
System Hang
Problem:
Processor Graphics internal message cycles occurring concurrently with a physical
memory read by graphics from certain memory ranges may cause memory reads to be
stalled resulting in a system hang. The following physical page (4K) addresses cannot
be assigned to Processor Graphics: 00_2005_0xxx, 00_2013_0xxx, 00_2013_8xxx and
00_4000_4xxx.
Implication:
Due to this erratum, accesses by the graphics engine to the defined memory ranges
may cause memory reads to be stalled, resulting in a system hang.
Workaround:
A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ52.
Execution of Opcode 9BH with the VEX Opcode Extension May Produce
a #NM Exception
Problem:
Attempt to use opcode 9BH with a VEX opcode extension should produce a #UD
(Invalid-Opcode) exception. Due to this erratum, if CR0.MP and CR0.TS are both 1, the
processor may produce a #NM (Device-Not-Available) exception if one of the following
conditions exists:
•66H, F2H, F3H or REX as a preceding prefix.
•An illegal map specified in the VEX.mmmmm field.
Implication:
Due to this erratum, some undefined instruction encodings may produce a #NM instead
of a #UD exception.
Workaround:
Software should not use opcode 9BH with the VEX opcode extension.
Status:
For the steppings affected, see the Summary Tables of Changes.
36
Specification Update
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