Campbell 21X Operator's Manual page 139

13.3
THE EF ECT OF SENSOR LEAD
N
THE SIGNAL SETTLING
LENGTH
TIME
Whenever an
analog input
is
switched into the
21X measurdment circuitry prior to making
a
measuremedt, a
finite amount of time
is
required for
tfe
signal
to stabilize at
its
correct
value.
The
ralte
at which
the signal settles
is
determined by
the input settling time constant
which is a
function of both the source
resistance, ahd input
capacitance (explained
below). The P1X allows a
450ps settling time
before initiatihg
the measurement. In most
applications
lhis settling time
is
adequate, but
the additionaf wire capacitance associated with
long sensor
can increase the settling time
constant to
tlhe
point
that measurement errors
are
three potential sources of
settle before
the measurement
1.
The must rise
to
its
correct value.
2.
A small
( smV) caused by
switchi
the
analog input into the
circuitry must settle.
nsient, usually about 40mVA/,
the switched, precision excitation
in resistive bridge
must settle.
The of
this section
is
to bring attention
to potential errors
caused when
the input
time
constant gets
too large
procedures whereby the effects
on
the measurement can be
estimated. lrl addition, physicalvalues are given
for three typps of
wire used in Campbell
Scientific sensors, and error estimates
for given
lead lengths
are
provided.
Finally, techniques
are discuss4d
for minimizing input settling error
when long
l{ads are mandatory.
13.3.1 THE INFUT SETTLING TIME CONSTANT
The rate
at
which
an input voltage rises to
its
full
value
or
that
a
transient decays to the correct
input level
afe both determined by the input
settling time
constant. ln both cases
the
waveform is an
exponential.
Figure 13.3-1
shows both
p rising and decaying waveform
settling to
tfip signal level,
Vso. The rising input
voltage is d{scribed by Equation 13.3-1 and the
decaying in$ut
voltage by Equation 13.3-2,
SECTION
13. 21X MEASUREMENTS
FIGURE
13.3-1. Input Voltage Rise and
Transient Decay
v"
=
v"o(t-"-tlRocr
)
rise
[13.3-1]
V" = v"o
*(v"o
-
v"o)e-tlRo"t,
d"""y
t13.3-21
where
V,
is
the input voltage,
V"o
the true signal
voltage,
V"o
the peak transient voltage,
t
is time
in
seconds,
Ro
the source resistance
in ohms,
and C1 is
the total
capacitance between the
signal lead and ground
(or some other fixed
reference
value)
in
farads.
The settling time constant in seconds,
t,
and the
capacitance relationships are given
in
Equations 13.3-3 through 13.3-5,
U.J
may occur.
error which
is made:
3.
A larger
caused
voltage
where
Cr
is
the
fixed 21X input capacitance in
farads,
C", is
the
wire capacitance in farads/foot,
and L is the
wire length
in
feet.
Equations 13.3-1
and 13.3-2 can be used to
estimate
the input settling
error,V., directly.
For
the rising case, V" = V"o-V",
whereas for the
decaying transient, Vs
=
Vso*V". Substituting
these relationships for V, in Equations 13.3-1
and 13.3-2, respectively, yields expressions
in
V",
the input settling error:
t
=
RoCr
CT =
Cf+CwL
Cf =
3.3
nfd
Ve
=
Vso€-t/Rocr, rise
Ve = V'eo
e-t/RocT, decay
[13.3-3]
[13.3-4]
[13.3-5]
[13.3-6]
[13.3-7]
and to
of lead
Where V'"o = V"o-V.o,
the difference between
the peak transient voltage and the true signal
voltage.
13-3