Ddr (Double Data Rate) Ram; Ecc (Error Checking And Correction); Eeprom (Electronic Erasable Programmable Rom); Eprom (Erasable Programmable Rom) - AOpen AX4SG Online Manual
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Also See for AX4SG:
- Manual (140 pages) ,
- Manual (152 pages) ,
- Easy installation manual (8 pages)
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DDR RAM utilizes the existing
available to systems in an easy to design and simple to adopt way. Based on FSB frequency, DDR RAM on the market are DDR200,
DDR266 and DDR333 with more coming around soon.
DDR200, transfer bandwidth up to 200x64/8=1600MB/s (PC1600)
DDR266, transfer bandwidth up to 266x64/8=2100MB/s (PC2100)
DDR333, transfer bandwidth up to 333x64/8=2700MB/s (PC2700)
DDR400, transfer bandwidth up to 400x64/8=3200MB/s (PC3200)
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The ECC mode needs 8 ECC bits for 64-bit data. Each time memory is accessed; ECC bits are updated and checked by a special
algorithm. The ECC algorithm has the ability to detect double-bit error and automatically correct single-bit error while parity mode can only
detect single-bit error.
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Also known as E
PROM. Both EEPROM and
different. Size of EEPROM is much smaller than flash ROM.
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Traditional motherboard stores BIOS code in EPROM. EPROM can only be erased by ultra-violet (UV) light. If BIOS has to be upgraded,
you need to remove EPROM from motherboard, clear by UV light, re-program, and then insert back.
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SDRAM
(For ex, PC-100, PC-133) infrastructure and technology while doubling the nominal bandwidth
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Flash ROM
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can be re-programmed by electronic signals, but the interface technology is
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