Fluke 5220A Instruction Manual page 45

Theory of Operation
3
Circuit Analysis
enabled so that a status read can take place when BC0 and BC2 go high. Status read
causes the w/not R line to go low for the duration of the BC0 and BC2 inputs. At the end
of status read, the RS flop-flop is reset, closing the w/not R gate (U5-8) until it is
reopened by another programming input. This process is repeated every 16 ms because
the 5100 Series Calibrator refreshes the programming input to the 5220A at this rate.
Status information is received at the MIS I/F as three bits of parallel data (Remote Status,
Operate Status, and Overload Status) from the A10 Logic. When the 5100 Series
Calibrator places the correct address on the address bus (BC0 and BC2 high), the read
status logic responds by pulling the not ACK line low and gating the three status bits onto
the data bus. The not ACK signal is sent to the 5100 to acknowledge the receipt of a valid
address. At the same time the RS flip-flop in the read status logic is reset. This causes a
read command (W/nor R low) to be sent to the 5100 so that it can read the data bus. The
acknowledge output and the w/not R line will return high when the status address code is
removed from the address bus.
The analog output from the 5100 is passed through the Y5000 and the MIS I/F by way of
a two-wire (high, low) analog bus. The signal is routed directly from the MIS I/F to the
rear input connections on the A5 Preamplifier.
BDO-BD2
BCO, BC2
BCO, BC3, BC6
BDO-BC3
ajs06f.wmf
Figure 3-10. A11 MIS Bus Interface
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