Vga Frame Buffer A - Clevo W110ER Service Manual

VGA Frame Buffer A

Frame Buffer Partition A
PLACE UNDER BALLS FBVDDQ
C144 C146 C134 C508 C145 C143
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04
FBVDDQ
C494 C493 C510 C509 C505 C496
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04
U7
FBVDDQ
FBA_CMD30 J3 B2
RAS VDD
FBA_CMD15 K3 D9
CAS VDD
FBA_CMD13 L3 G7
L2 WE VDD K2
FBA_CMD0
CS VDD K8
VDD N1
VDD
FBA_CMD9 N3 N9
A0 VDD
FBA_CMD11 P7 R1
A1 VDD
FBA_CMD8 P3 R9
A2 VDD
FBA_CMD25 N2
P8 A3 A1
FBA_CMD10
P2 A4 VDDQ A8
FBA_CMD24
R8 A5 VDDQ C1
FBA_CMD22
R2 A6 VDDQ C9
FBA_CMD7
A7 VDDQ
FBA_CMD21 T8 D2
A8 VDDQ
FBA_CMD6 R3 E9
L7 A9 VDDQ F1
FBA_CMD29
R7 A10 VDDQ H2
FBA_CMD23
N7 A11 VDDQ H9
FBA_CMD28
T3 A12 VDDQ
FBA_CMD20
A13
M2
FBA_CMD12
N8 BA0 A9
FBA_CMD27
M3 BA1 VSS B3
FBA_CMD26
BA2 VSS E1
VSS G8
K9 VSS J2
FBA_CMD3
J7 CKE VSS J8
FBA_CLK0 F BA_CLK0
13 FBA_CLK0
K7 CK VSS M1
FBA_CLK0#
13 FBA_CLK0#
CK VSS M9
VSS P1
R349
J1 VSS P9
J9 NC1 VSS T1
160_1%_04
L1 NC2 VSS T9
L9 NC3 VSS
F BA_CLK0#
M7 NC4 B1
T7 NC5 VSSQ B9
NC6 VSSQ D1
VSSQ D8
VSSQ E2
T2 VSSQ E8
FBA_CMD5 FBVDDQ
RESET VSSQ F9
K1 VSSQ G1
FBA_CMD2
ODT VSSQ G9
L8 VSSQ
FBA_ZQ0
ZQ
16mil <500mil
H1
R96 FBA_VREF 0
VREFDQ M8
VREFCA
243_1%_04 C150
0.01u_16V_X7R_04
F BA_D16 E3 D7 FBA_D10
F7 DQL0 DQU0 C3
F BA_D20 FBA_D12
F2 DQL1 DQU1 C8
F BA_D19 FBA_D8
F8 DQL2 DQU2 C2
F BA_D21 FBA_D15
H3 DQL3 DQU3 A7
F BA_D17 FBA_D9
H8 DQL4 DQU4 A2
F BA_D22 FBA_D13
G2 DQL5 DQU5 B8
F BA_D18 FBA_D11
F BA_D23 H7 DQL6 DQU6 A3 FBA_D14
DQL7 DQU7
E7 D3
F BADQM2 FBADQM1
F3 DML DMU C7
F BADQS_WP2 FBADQS_WP1
G3 DQSL DQSU B7
F BADQS_RN2 FBADQS_RN1
DQSL DQSU
K4W2G1646C-HC11
PLACE NEAR BALLS
FBVDDQ
C216 C871 C215 C188
+ +
MP2VLPU330MC4R2
*330u_2.5V_V_A *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
FBA_CMD[31: 0]
13 FBA_CMD[31:0]
FBA_D[63: 0]
13 FBA_D[63:0]
FBADQM[7:0]
13 FBADQM[7:0]
FBADQS_WP[7:0]
13 FBADQS_WP[7:0]
C154 C155 FBADQS_RN[ 7:0]
13 FBADQS_RN[7:0]
1u_6.3V_X5R_04 1u_6.3V_X5R_04
FBVDDQ
C489 C112 C111
4.7u_6.3V_X5R_06 4.7u_6.3V_X5R_06 4.7u_6.3V_X5R_06
C495 C498
1u_6.3V_X5R_04 1u_6.3V_X5R_04
MIRROR MODE COMMAND MAP PING
LO WER UPPER
0. .31 32. .63
U29 CMD30 RAS* RAS*
CMD15 CAS* CAS*
FBVDDQ
CMD13 WE* W E*
CMD0 CS0* N/ A
F BA_CMD30 J3 B2 CMD1 N/A N/ A
RAS VDD CMD16 N/A CS0*
FBA_CMD15 K3 D9
CAS VDD CMD17 N/A N/ A
FBA_CMD13 L3 G7
CMD9 A0 A0
L2 WE VDD K2
FBA_CMD0 CMD11 A1 A1
CS VDD K8
CMD8 A2 A2
VDD N1 CMD25 A3 A3
VDD CMD10 A4 A4
FBA_CMD9 N3 N9
CMD24 A5 A5
A0 VDD
FBA_CMD11 P7 R1 CMD22 A6 A6
A1 VDD
FBA_CMD8 P3 R9 CMD7 A7 A7
A2 VDD CMD21 A8 A8
FBA_CMD25 N2
P8 A3 A1 CMD6 A9 A9
FBA_CMD10
CMD29 A10 A10
P2 A4 VDDQ A8
FBA_CMD24 CMD23 A11 A11
R8 A5 VDDQ C1
FBA_CMD22 CMD28 A12 A12
R2 A6 VDDQ C9 CMD20 A13 A13
FBA_CMD7
CMD4 A14 A14
A7 VDDQ
FBA_CMD21 T8 D2
CMD14 A15 A15
A8 VDDQ
FBA_CMD6 R3 E9 CMD12 BA0 BA0
L7 A9 VDDQ F 1
FBA_CMD29 CMD27 BA1 BA1
R7 A10 VDDQ H2 CMD26 BA2 BA2
FBA_CMD23
N7 A11 VDDQ H9 CMD3 CKE N/ A
FBA_CMD28
CMD19 N/A CKE
T3 A12 VDDQ
FBA_CMD20 CMD2 ODT N/ A
A13
CMD18 N/A O DT
CMD5 RST RST
M2
FBA_CMD12
N8 BA0 A9
FBA_CMD27
M3 BA1 VSS B3
FBA_CMD26
BA2 VSS E1
VSS G8
K9 VSS J2
FBA_CMD3
J7 CKE VSS J8
FBA_CLK0
13 F BA_CLK1
K7 CK VSS M1
FBA_CLK0#
13 F BA_CLK1#
CK VSS M9
VSS P1
J1 VSS P9
J9 NC1 VSS T1
L1 NC2 VSS T9
L9 NC3 VSS
M7 NC4 B1
T7 NC5 VSSQ B9
NC6 VSSQ D1
VSSQ D8
VSSQ E2
T2 VSSQ E8
FBA_CMD5
RESET VSSQ F 9
K1 VSSQ G1
FBA_CMD2
ODT VSSQ G9
L8 VSSQ
R104 FBA_ZQ1
ZQ
1.1K_1%_04 16mil <500mil
H1
R345 FBA_VREF0
VREF DQ M8
VREFCA
R97 243_1%_04
1.1K_1%_04
FBA_D5 E3 D7 FBA_D30
F7 DQL0 DQU0 C3
FBA_D2 FBA_D26
F2 DQL1 DQU1 C8
FBA_D4 FBA_D28
F8 DQL2 DQU2 C2
FBA_D0 FBA_D24
H3 DQL3 DQU3 A7
FBA_D7 FBA_D29
H8 DQL4 DQU4 A2
FBA_D3 FBA_D27
G2 DQL5 DQU5 B8
FBA_D6 FBA_D31
FBA_D1 H7 DQL6 DQU6 A3 FBA_D25
DQL7 DQU7
E7 D3
FBADQM0 FBADQM3
F3 DML DMU C7
FBADQS_WP0 FBADQS_WP3
G3 DQSL DQSU B7
FBADQS_RN0 FBADQS_RN3
DQSL DQSU
K4W2G1646C-HC11
Term Description
The total trace length measured
from GPU ball to capacitor is
Under GPU
no more than 150 mil
The total trace length measured
from GPU ball to capacitor is no
Near GPU more than 850 mil
FBVDDQ
PLACE UNDER BALLS
C99 C55 C56 C83 C100
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
PLACE UNDER BALLS
C488
FBVDDQ
4.7u_6.3V_X5R_06
C480 C465 C481 C485 C470
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
U3 U26
FBVDDQ
FBA_CMD30 J3 B2 FBA_CMD30 J3
RAS VDD RAS
FBA_CMD15 K3 D9 FBA_CMD15 K3
CAS VDD CAS
FBA_CMD13 L3 G7 FBA_CMD13 L3
L2 WE VDD K2 L2 WE
FBA_CMD16 FBA_CMD16
CS VDD K8 CS
VDD N1
VDD
FBA_CMD9 N3 N9 FBA_CMD9 N3
A0 VDD A0
FBA_CMD11 P7 R1 FBA_CMD11 P7
A1 VDD A1
FBA_CMD8 P3 R9 FBA_CMD8 P3
A2 VDD A2
FBA_CMD25 N2 FBA_CMD25 N2
P8 A3 A1 P8 A3
FBA_CMD10 FBA_CMD10
P2 A4 VDDQ A8 P2 A4
FBA_CMD24 FBA_CMD24
R8 A5 VDDQ C1 R8 A5
FBA_CMD22 FBA_CMD22
R2 A6 VDDQ C9 R2 A6
FBA_CMD7 FBA_CMD7
A7 VDDQ A7
FBA_CMD21 T8 D2 FBA_CMD21 T8
A8 VDDQ A8
FBA_CMD6 R3 E9 FBA_CMD6 R3
L7 A9 VDDQ F1 L7 A9
FBA_CMD29 FBA_CMD29
R7 A10 VDDQ H2 R7 A10
FBA_CMD23 FBA_CMD23
N7 A11 VDDQ H9 N7 A11
FBA_CMD28 FBA_CMD28
T3 A12 VDDQ T3 A12
FBA_CMD20 FBA_CMD20
A13 A13
M2 M2
FBA_CMD12 FBA_CMD12
N8 BA0 A9 N8 BA0
FBA_CMD27 FBA_CMD27
M3 BA1 VSS B3 M3 BA1
FBA_CMD26 FBA_CMD26
BA2 VSS E1 BA2
VSS G8
K9 VSS J2 K9
FBA_CMD19 FBA_CMD19
J7 CKE VSS J8 J7 CKE
FBA_CLK1 FBA_CLK1 FBA_CLK1
K7 CK VSS M1 K7 CK
FBA_CLK1# FBA_CLK1#
CK VSS M9 CK
VSS P1
R327
J1 VSS P9 J1
J9 NC1 VSS T1 J9 NC1
160_1%_04
L1 NC2 VSS T9 L1 NC2
L9 NC3 VSS L9 NC3
FBA_CLK1#
M7 NC4 B1 M7 NC4
T7 NC5 VSSQ B9 T7 NC5
NC6 VSSQ D1 NC6
VSSQ D8
VSSQ E2
T2 VSSQ E8 T2
FBA_CMD5 FBVDDQ FBA_CMD5
RESET VSSQ F9 RESET
K1 VSSQ G1 K1
FBA_CMD18 FBA_CMD18
ODT VSSQ G9 ODT
L8 VSSQ L8
FBA_ZQ2 FBA_Z Q3
ZQ ZQ
R34
16mil <500mil
1.1K_1%_04
H1
R45 FBA_VREF1 R328
VREFDQ M8
VREFCA
243_1%_04 C72 R33 243_1%_04
0.01u_16V_X7R_04 1.1K_1%_04
FBA_D61 E3 D7 FBA_D34 FBA_D45 E3
F7 DQL0 DQU0 C3 F7 DQL0
FBA_D63 FBA_D37 FBA_D40
F2 DQL1 DQU1 C8 F2 DQL1
FBA_D58 FBA_D32 FBA_D46
F8 DQL2 DQU2 C2 F8 DQL2
FBA_D62 FBA_D38 FBA_D42
H3 DQL3 DQU3 A7 H3 DQL3
FBA_D57 FBA_D33 FBA_D47
H8 DQL4 DQU4 A2 H8 DQL4
FBA_D60 FBA_D39 FBA_D41
G2 DQL5 DQU5 B8 G2 DQL5
FBA_D59 FBA_D35 FBA_D44
FBA_D56 H7 DQL6 DQU6 A3 FBA_D36 FBA_D43 H7 DQL6
DQL7 DQU7 DQL7
E7 D3 E7
FBADQM7 F BADQM4 FBADQM5
F3 DML DMU C7 F3 DML
FBADQS_WP7 F BADQS_WP4 FBADQS_WP5
G3 DQSL DQSU B7 G3 DQSL
FBADQS_RN7 F BADQS_RN4 FBADQS_RN5
DQSL DQSU DQSL
K4W2G1646C-HC11 K4W2G1646C-HC11
13,15,37 FBVDDQ
Schematic Diagrams
C43 C84 C57
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
C464 C469 C484
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
FBVDDQ
B2
VDD
D9
VDD
G7
VDD K2
VDD K8
VDD N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1
Sheet 14 of 48
VDDQ A8
VDDQ C1
VDDQ C9
VDDQ
D2
VDDQ
E9
VGA Frame Buffer
VDDQ F1
VDDQ H2
VDDQ H9
VDDQ
A
A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSS
B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
VSSQ
16mil <500mil
H1
FBA_VREF1
VREFDQ M8
VREFCA
D7 FBA_D52
DQU0 C3
FBA_D49
DQU1 C8
FBA_D55
DQU2 C2
FBA_D50
DQU3 A7
FBA_D53
DQU4 A2
FBA_D48
DQU5 B8
FBA_D54
DQU6 A3 FBA_D51
DQU7
D3
FBADQM6
DMU C7
FBADQS_WP6
DQSU B7
FBADQS_RN6
DQSU
VGA Frame Buffer A B - 15