Fujitsu MB15E07SL User Manual page 13

SERIAL DATA INPUT TIMING
Data MSB
Clock
t
1
t
7
LE
On the rising edge of the clock, one bit of data is transferred into the shift register.
Parameter Min
t 20
1
t 20
2
t 30
3
t 30
4
Note : LE should be "L" when the data is transferred into the shift register.
1st data
t
2
Typ Max Unit Parameter
– – ns
– – ns
– – ns
– – ns
MB15E07SL
Control bit Invalid data
LSB
t
3
t t
4 5
Min Typ Max
t 100 – –
5
t 20 – –
6
t 100 – –
7
2nd data
t
6
Unit
ns
ns
ns
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