Reset Circuit; Figure 2-33. Reset Circuit - Epson ActionLaser 1300 EPL-3000 Service Manual

Operating Principks

2.2.1.1 Reset Circuit

The 68000 CPU contains the reset terminal, which is bidirectional and can initialize the system
either from inside or outside the CPU. 7he entire system (the CPU and the external devices) can be
initialized if both the HALT (CPU pin 20) and RESET (CPU pin 21) signals are active
simultaneously. By executing a RESET instruction, a RESET pulse from inside the CPU can also be
issued to reset all the devices comected to the RESET line. This circuit uses an M51953B IC to
monitor the supply voltage and reset the CPU if a voltage level less than 4.25 V is detected. The
reset time is approximately 840 ms.
M51953BFP
(lCl)
c
+
2.2.1.2 Bus Control Circuit
The 68(111 CPU outputs the R/W (read/write), AS (address
(processor status) signals to ASIC EQ5A83. ASIC E05At33 uses these signals to generate the RD
(read strobe), DTACK (wait control), VPA (interrupt control), and BERR (bus error) signals.
CPU
68000
2-22

Figure 2-33. Reset Circuit

R/W
Address Data
Bus Bus
Figure 2-34. Bus Control Circuit
RESET
strobe); and Fco, Fcl, and Fc2
D w R
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Rev. A