Hardware Management User Interfaces - IBM 9123710 - eServer OpenPower 710 Introduction Manual

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HMC
Ports
Rack Ind Conn
Figure 2-12 Service processor block diagram
The PPC405 core is five-stage pipeline instruction processor and contains 32-bit general
purpose registers. The Flash ROM contains a compressed image of a software load.
FSP-B has four UART cores, which provide a full duplex serial interface. As shown in
Figure 2-12, UART #1 and UART #2 are used for RS232 Serial Port #1 and RS232 Serial
Port #2, respectively. UART #3 is used for Rack VPD/Light interface. UART #4 is not used.

2.9.6 Hardware management user interfaces

In the following sections we will give you a brief overview of the different OpenPower 710
server hardware management user interfaces available.
Advanced System Management Interface
The Advanced System Management Interface (ASMI) is the interface to the service processor
that allows you to set flags that affect the operation of the server, such as auto power restart,
and to view information about the server, such as the error log and vital product data.
This interface is accessible using a Web browser on a client system that is connected to the
service processor on an Ethernet network. It can also be accessed using a terminal attached
to a serial port on the server. The service processor and the ASMI are standard on all IBM
Sserver i5, Sserver p5, and OpenPower servers.
You may be able to use the service processor's default settings. In that case, accessing the
ASMI is not necessary.
Service processor
Block Diagram
RISC Watch
Conn
32.768 KHz
RTC
OSC
RJ-45
Enet #1
Broadcom
PHY
RJ-45
Enet # 2
4 MHz
TOD/SIT
OSC
DS
UART
1-wire
#3
UART
UART
#1
#2
S1-rear
XCVR
DB9
S2-rear
XCVR
DB9
PHB1
PCI-X at 100 MHz
Flash ROM
40 MB or48 MB
Flash
NVRAM
ALE
Interface
Base
DDR
DDR
Interface
64 MB
(FSP-B)
I2C
Engines
JTAG
Engines
UART
INTR
#4
Secondary
Secondary
PCI
PCI
UART #3
UART #3
PCI Bus
UART #4
UART #5, Port0
UART #6
Extender
(FSP-E)
UART
#1-2, 7-9
Chapter 2. Architecture and technical overview
NVRAM
Controller
SRAM
1 MB
4 I2C
Engines
2 JTAG
Engines
8
Interrupts
X/R
X/R
PS1
MUX
X/R
PS2
To Smartchip VPD
Serial MUX
GPIO
GPIO
I2C
6 I2C Engines
Engines
JTAG
8 JTAG Engines
Engines
5 Interrupts
INTR
45

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