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Related Manuals for RME Audio ADI-192 DD
Summary of Contents for RME Audio ADI-192 DD
- Page 1 User's Guide ADI-192 DD ™ SyncAlign ™ SyncCheck ™ Intelligent Clock Control ™ SteadyClock Hi-Precision 24 Bit / 192 kHz 8-Channel Triple Universal Format Converter 8-Channel Sample Rate Converter ® ™ ADAT optical - TDIF - AES/EBU Interface TDIF-1 24 Bit Interface...
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Page 2: Table Of Contents
11.2 Lock, SyncCheck and SyncAlign ......35 11.3 DS – Double Speed ..........36 11.4 QS – Quad Speed..........36 11.5 AES/EBU – SPDIF ..........37 11.6 Group Delay – I/O Latency ........38 11.7 SteadyClock ............39 Block Diagram ............40 User's Guide ADI-192 DD © RME... - Page 3 When mounting in a rack, leave some space between this device and others for ventilation. Unauthorized servicing/repair voids warranty. Only use accessories specified by the manufacturer. Read the manual completely. It includes all information necessary to use and operate this device. User's Guide ADI-192 DD © RME...
- Page 4 User's Guide ADI-192 DD © RME...
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Page 5: General
User's Guide ADI-192 DD General User's Guide ADI-192 DD © RME... -
Page 6: Introduction
From small project studios to broadcast and television, the Universal Format Converter is the perfect link between the formats mostly used today. As a consequent continuation of RME's world-wide successful ADI series, the 192 DD also contains elaborate technology and the latest integrated circuits. The ADI-192 DD is a uniquely powerful and high-quality device, which will excite you even after many years of operation. -
Page 7: First Usage - Quick Start
SPDIF I/O with TOSLINK connectors. INPUT MONITOR indicates a valid input signal separately for each digital input. Additionally, RME's exclusive SyncCheck indicates if one of these inputs is locked, but not synchronous to the others. See also chapter 5.1 and 11.2. -
Page 8: Quick Start
AES1 XLR output, i.e. channels 1/2, but carries a fixed channel status Consumer. The ADI-192 DD stores all settings before switching off and sets them automatically when switching on the next time. User's Guide ADI-192 DD © RME... -
Page 9: The Dd Plain And Simple
When an OUTPUT is set to the same SOURCE that is selected as SOURCE of the SRC, the OUTPUT SOURCE automatically changes to SRC. The fourth choice shown in the block dia- gram, the SRC bus, is selected from the device itself, and not selectable via the OUTPUT but- ton. User's Guide ADI-192 DD © RME... -
Page 10: Warranty
All entries in this User's Guide have been thoroughly checked, however no guarantee for cor- rectness can be given. RME cannot be held responsible for any misleading or incorrect informa- tion provided throughout this manual. Lending or copying any part or the complete manual or its contents as well as the software belonging to it is only possible with the written permission from RME. - Page 11 For this the device has to be sent free to the door to: IMM Elektronik GmbH Leipziger Straße 32 D-09648 Mittweida Germany Shipments not prepaid will be rejected and returned on the original sender's costs. User's Guide ADI-192 DD © RME...
- Page 12 User's Guide ADI-192 DD © RME...
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Page 13: Usage And Operation
User's Guide ADI-192 DD Usage and Operation User's Guide ADI-192 DD © RME... -
Page 14: Front Panel Controls Input Monitor
Therefore the DW LED is just a user information, but does not cause any action in the ADI-192 DD. Devices from RME always send out a correct signalling. 5.2 SRC INPUT The button SRC INPUT SOURCE defines the data path in which the sample rate converter will be inserted: AES, TDIF or ADAT. -
Page 15: Clock Section
A manual configuration via the STATE button is no longer required. This function is deactivated for the ADAT and TDIF input, as the sample rate range of these formats can not be detected automatically. User's Guide ADI-192 DD © RME... -
Page 16: Aes Output
LED indicates an invalid or missing input signal. Selecting the same input in the OUTPUT section as in the SRC INPUT SOURCE section, the LED SRC signals an active sam- ple rate conversion. User's Guide ADI-192 DD © RME... -
Page 17: Inputs Aes/Ebu
Emphasis, this information is coded into all AES outputs, i.e. globally passed on. Emphasis is not available within the ADAT standard! This information is neither passed on to the ADAT output, nor taken into account later on for acoustic transmission! User's Guide ADI-192 DD © RME... -
Page 18: Tdif
The TDIF-1 connectors of the ADI-192 DD are fully compatible with all devices offering such an interface*. RME's exclusive SyncCheck verifies synchronous operation when using both TDIF ports. The connection is done through a special TDIF cable, available at your local dealer (Tas- cam part number PW-88D). -
Page 19: Adat Optical
The ADAT optical inputs of the ADI-192 DD are fully compatible with all ADAT optical outputs. RME's unsurpassed Bitclock PLL prevents clicks and drop outs even in extreme varipitch op- eration, and guarantees a fast and sample accurate lock to the digital input signal. A standard TOSLINK cable is sufficient for connection. -
Page 20: Outputs Aes/Ebu
This realizes a useful distribution mode, sending one AES signal to four devices at the same time (splitter/distributor). The distribution mode is also available when using the front SPDIF input. Please note that this special function is only active in Single Speed operation, but also with SRC activated. User's Guide ADI-192 DD © RME... -
Page 21: Tdif
1-2-3-4, but 1-3-2-4. In case the special 192 kHz mode of the DTRS machine DA-98HR shall be used, the machine should be connected and used with the ADI-192 DD via AES. User's Guide ADI-192 DD © RME... -
Page 22: Adat Optical
2 channels only, for up to 4 channels MAIN and AUX have to be used. The sam- ples/channels are distributed as follows: Channel Port MAIN MAIN MAIN MAIN Samples 1a/b 1c/d 2a/b 2c/d 3a/b 3c/d 4a/b 4c/d Both conversions are lossless. The existing samples are just spread between the channels. User's Guide ADI-192 DD © RME... -
Page 23: The Sample Rate Converter General
AES, TDIF or ADAT. With no LED lit, the SRC is deactivated. Selecting the same input in the OUTPUT section as in the SRC INPUT SOURCE section, the LED SRC indicates an activated sample rate conversion. Selecting the function SRC in the OUTPUT sections is not necessary. User's Guide ADI-192 DD © RME... - Page 24 An ADAT input signal of 48 kHz could effectively be 48 kHz (no RANGE LED), 96 kHz S/MUX (LED RANGE DS) or 192 kHz S/MUX4 (RANGE LED QS). Therefore, the range has to be con- figured manually. User's Guide ADI-192 DD © RME...
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Page 25: Clock Decoupling Using The Src
Thanks to the SRC, the ADI-192 DD always delivers a constant output clock, no matter if the inputs are not being used at the moment, are just being connected or have been used all the time. User's Guide ADI-192 DD © RME... -
Page 26: Word Clock
Speed, the ADI-192 DD automatically adapts to it. As soon as a valid signal is detected, the WCK LED is lit, else it flashes. Thanks to RME's Signal Adaptation Circuit, the word clock input still works correctly even with heavily mis-shaped, dc-prone, too small or overshoot-prone signals. Thanks to automatic signal centering, 300 mV (0.3V) input level is sufficient in principle. -
Page 27: Technical Description And Background
Many other devices use a much coarser word clock PLL to track the ADAT input. When changing the sample rate (speed) fast, some bits are already sampled inval- idly before the frequency is corrected. Drop outs and crackling will be the audible result. User's Guide ADI-192 DD © RME... -
Page 28: Cables And Termination
T-adapter, but to use the ADI’s word clock output instead. Thanks to SteadyClock, the input signal will both be freed from jitter and - in case of loss or drop out – be reset to a valid frequency. User's Guide ADI-192 DD © RME... -
Page 29: Technical Reference
User's Guide ADI-192 DD Technical Reference User's Guide ADI-192 DD © RME... -
Page 30: Technical Specifications
• Level range: 1.0 Vpp – 5.6 Vpp • Lock range: 28 kHz – 220 kHz • Jitter when synced to input signal: < 1 ns • Jitter suppression: > 30 dB (2.4 kHz) User's Guide ADI-192 DD © RME... -
Page 31: Outputs
• Jitter suppression of external clocks: > 30 dB (2.4 kHz) • PLL ensures zero dropout, even at more than 100 ns jitter • Digital Bitclock PLL for trouble-free varispeed ADAT operation • Group delay: typically 3 samples User's Guide ADI-192 DD © RME... -
Page 32: Sample Rate Converter
AES/EBU and SPDIF are biphase modulated signals, therefore polarity doesn't matter. Pins 2 and 3 are neither hot nor cold, they carry the same signal. But as AES3 uses a balanced trans- mission they are inverted in polarity. User's Guide ADI-192 DD © RME... -
Page 33: Firmware
Changes in firmware 2.2 1. More sensitive mute for TDIF when encountering clock problems. Prevents noise in certain situations with invalid clock. (v 2.1) 2. New function Follow Clock for automated CLOCK STATE switching. User's Guide ADI-192 DD © RME... -
Page 34: Technical Background
S/MUX4. The distribution of the samples is described in chapter 11.4. Note: All conversions of the described methods are lossless. The existing samples are just spread or re-united between the channels. User's Guide ADI-192 DD © RME... -
Page 35: Lock, Synccheck And Syncalign
PLLs and data buffers. Therefore there can be a random error of ± 1 sample difference between the stereo pairs. The ADI-192 DD's exclusive SyncA- lign technology avoids this effect and guarantees sample synchronicity among all four stereo channels. User's Guide ADI-192 DD © RME... -
Page 36: Ds - Double Speed
This transmission mode is being called Quad Wire in the professional studio world, and is also known as S/MUX4 in connection with the ADAT format. The AES3 specification does not mention Quad Wire. User's Guide ADI-192 DD © RME... -
Page 37: Aes/Ebu - Spdif
The table shows that a Professional-coded signal would lead to malfunctions for copy prohibi- tion and emphasis, if being read as Consumer-coded data. Nowadays many devices with SPDIF input can handle Professional subcode. Devices with AES3 input almost always accept Consumer SPDIF (passive cable adapter necessary). User's Guide ADI-192 DD © RME... -
Page 38: Group Delay - I/O Latency
AES to TDIF - TDIF to ADAT - ADAT to AES AES to AES with SRC Sample Multiplexing AES Double Wire to Single Wire or vice versa AES Quad Wire to Single Wire or vice versa User's Guide ADI-192 DD © RME... -
Page 39: Steadyclock
Latest circuit designs like hi-speed digital synthesizer, digital PLL, 100 MHz sample rate and analog filtering allow RME to realize a completely newly developed clock technology, right within the FPGA at lowest costs. The clock's performance exceeds even professional expectations. -
Page 40: Block Diagram
12. Block Diagram User's Guide ADI-192 DD © RME...