Real-Time Clock, Cmos Sram, And Battery; Pci Express* Connectors - Intel BLKD945GCCR Specification

Desktop board technical product specification
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NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors.
For more information, see:
For information about
The location of the Serial ATA IDE connectors
1.5.4

Real-Time Clock, CMOS SRAM, and Battery

A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
1.6

PCI Express* Connectors

The board provides the following PCI Express connectors:
One PCI Express x16 connector supporting simultaneous transfer speeds up to
4 GBytes/sec of peak bandwidth per direction and up to 8 GBytes/sec concurrent
bandwidth
One PCI Express x1 connector. The x1 interface supports simultaneous transfer
speeds up to 250 Mbytes/sec of peak bandwidth per direction and up to
500 MBytes/sec concurrent bandwidth
The PCI Express interface supports the PCI Conventional bus configuration mechanism
so that the underlying PCI Express architecture is compatible with PCI Conventional
compliant operating systems. Additional features of the PCI Express interface include
the following:
Support for the PCI Express enhanced configuration mechanism
Automatic discovery, link training, and initialization
Support for Active State Power Management (ASPM)
SMBus 2.0 support
Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
Software compatible with the PCI Power Management Event (PME) mechanism
defined in the PCI Power Management Specification Rev. 1.1
http://www.serialata.org/
Product Description
Refer to
Figure 13, page 50
25

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