Silicon Laboratories C8051F560 User Manual
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Silicon Laboratories C8051F560 User Manual

Silicon Laboratories C8051F560 User Manual

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C8051F560 D
1. Relevant Devices
The C8051F560 Development Kit is intended as a development platform for the microcontrollers in the
C8051F55x/56x/57x MCU family. The members of this MCU family are C8051F550, C8051F551, C8051F552,
C8051F553, C8051F554, C8051F555, C8051F556, C8051F557, C8051F560, C8051F561, C8051F562,
C8051F563, C8051F564, C8051F565, C8051F566, C8051F567, C8051F568, C8051F569, C8051F570,
C8051F571, C8051F572, C8051F573, C8051F574, and C8051F575.
The target board included in this kit is provided with a pre-soldered C8051F568 MCU (QFN40 package) and a
C8051F550 MCU (QFN24 package).
Code developed on the C8051F568 can be easily ported to the other members of this MCU family.
Refer to the C8051F55x/56x/57x data sheet for the differences between the members of this MCU family.
2. Kit Contents
The C8051F560 Development Kit contains the following items:
C8051F560 Target Board
C8051Fxxx Development Kit Quick-Start Guide
Silicon Labs IDE and Product Information CD-ROM. CD content includes:
Silicon Labs Integrated Development Environment (IDE)

Evaluation assembler, compiler, and linker tools

Source code examples and register definition files

Documentation

Optional Third Party Tools CD
AC to DC Power Adapter
USB Debug Adapter
Two USB Cables
3. Hardware Setup
Refer to Figure 1 for a diagram of the hardware configuration.
1. Connect the USB Debug Adapter to the DEBUG A connector on the target board with the 10-pin ribbon cable.
2. Connect one end of the USB cable to the USB connector on the USB Debug Adapter.
3. Verify that shorting blocks are installed on the target board as shown in Figure 4 on page 9.
4. Connect the other end of the USB cable to a USB Port on the PC.
5. Connect the ac/dc power adapter to power jack P4 on the target board.
Notes:
Use the Reset icon in the IDE to reset the target when connected during a debug session.
Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the
ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can
damage the device and/or the USB Debug Adapter.
Rev. 0.1 4/09
E V E L O P M E N T
Copyright © 2009 by Silicon Laboratories
C 8 0 5 1 F 5 6 0 D K
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C8051F560DK

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Summary of Contents for Silicon Laboratories C8051F560

  • Page 1 UIDE 1. Relevant Devices The C8051F560 Development Kit is intended as a development platform for the microcontrollers in the C8051F55x/56x/57x MCU family. The members of this MCU family are C8051F550, C8051F551, C8051F552, C8051F553, C8051F554, C8051F555, C8051F556, C8051F557, C8051F560, C8051F561, C8051F562, C8051F563, C8051F564, C8051F565, C8051F566, C8051F567, C8051F568, C8051F569, C8051F570, C8051F571, C8051F572, C8051F573, C8051F574, and C8051F575.

  • Page 2: Software Setup

    C8051F560DK Target Board AC/DC Adapter Cable USB Debug Adapter Figure 1. Hardware Setup using a USB Debug Adapter 4. Software Setup The included CD-ROM contains the Silicon Labs Integrated Development Environment (IDE), evaluation 8051 tools, optional software utilities, and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will automatically launch, allowing you to install the IDE software or read documentation by clicking buttons on the Installation Panel.

  • Page 3: Software Overview

    5. To complete the installation process, connect the included USB cable between the host computer and the USB connector (P5) on the C8051F560 Target Board. Windows will automatically finish the driver installation. Information windows will pop up from the taskbar to show the installation progress.
  • Page 4 C8051F560DK 5.1.2. Getting Started With the Silicon Labs IDE The following sections discuss how to open an example project in the IDE, build the source code, and download it to the target device. 5.1.2.1. Running the F560_Blinky example program The F560_Blinky example program blinks an LED on the target board. 1.
  • Page 5 C8051F560DK 5.2. Configuration Wizard 2 The Configuration Wizard 2 is a code generation tool for all of the Silicon Labs devices. Code is generated through the use of dialog boxes for each of the device's peripherals. Figure 2. Configuration Wizard 2 Utility The Configuration Wizard 2 utility helps accelerate development by automatically generating initialization source code to configure and enable the on-chip resources needed by most design projects.

  • Page 6: Example Source Code

    GPIO port pin. When compiled/assembled and linked, this program flashes the green LED on the C8051F560 Target Board about five times a second using the interrupt handler with a C8051F560 timer.

  • Page 7: Target Board

    C8051F560DK 7. Target Board The C8051F560 Development Kit includes a target board with a C8051F568 (Side A) and C8051F550 (Side B) device pre-installed for evaluation and preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping using the target board. Refer to Figure 3 for the locations of the various I/O connectors.
  • Page 8 Port_3 “A” SIDE “A” Port_1 “B” C8051 P1.3_A F568 P1.4_A F550 Port_2 “A” C8051F560-TB PWR LED J10 J9 P1.4_B Port_2 “B” RESET_A SILICON LABS Port_1 “A” www.silabs.com P1.3_B RESET_B DEBUG_A DEBUG_B Figure 3. C8051F560 Target Board with Pin Numbers Rev. 0.1...
  • Page 9 C8051F560DK 7.1. Target Board Shorting Blocks: Factory Defaults The C8051F560 Target Board comes from the factory with pre-installed shorting blocks on many headers. Figure 4 shows the positions of the factory default shorting blocks. SIDE “B” Port_0 “A” Port_0 “B”...
  • Page 10 7.2. Target Board Power Options and Current Measurement (J4, J6, J7, J24, P4, TB1) The MCUs on the C8051F560 Target Board are powered from a +5 V net. The +5 V net is connected to the headers J4 and J24 (Side A) and J6 (Side B). Shorting blocks can be put on each header to connect the 5V net to the VREGIN and VIO pins on the two MCUs.
  • Page 11 C8051F560DK 7.4. Switches and LEDs (J15, J19) Two push-button switches are provided on the target board for each MCU. Switch RESET_A is connected to the RST pin of the C8051F568. Switch RESET_B is connected to the RST pin of the C8051F550. Pressing RESET_A puts the C8051F568 device into its hardware-reset state, and similarly for RESET_B and the C8051F550 MCU.
  • Page 12 C8051F560DK 7.6. Serial Interface (P5, J17) A USB-to-UART bridge circuit (U5) and USB connector (P5) are provided on the target board to facilitate serial connections to UART0 of the C8051F568 (Side A). The Silicon Labs CP2102 USB-to-UART bridge provides data connectivity between the C8051F568 and the PC via a USB port.
  • Page 13 C8051F560DK 7.8. LIN Interface and Network (J12, J17, J21, TB1) Both MCUs on the target board are connected to LIN transceivers through headers. These headers assume that the MCU’s crossbars are configured to put the LIN TX and RX pins on port pins P1.0 and P1.1 respectively. See the C8051F55x/56x/57x data sheet for crossbar configuration.
  • Page 14 C8051F560DK 7.9. Port I/O Connectors (J0-J3 and J11, J13, J16) Each of the parallel ports of the C8051F568 (Side A) and C8051F550 (Side B) has its own 10-pin header connector. Each connector provides a pin for the corresponding port pins 0-7, +5 V VIO, and digital ground. The same pin-out is used for all of the port connectors.
  • Page 15 J4[2-3] to connect VIO of the C8051F568 to +3.3 V instead of the default +5 V. The C8051F560 target board also includes an 8-bit latch (U8) for use with the multiplexed mode of the...
  • Page 16 7.14. Alternate Power Supply Headers (J18, J21) The C8051F560 Target Board includes two headers that allow for alternate power sources and power measurement. Header J18 connects the VIO voltage supplied to the Side A MCU to other peripherals on the board, such as the P1.4_A push-button switch pull-up, and the R27 potentiometer source.
  • Page 17 TX signal is routed to this pin. This is shown in the "Alternate Fixed Function" column. The "Target Board Function" column shows that this pin is used as TX on the C8051F560 Target Board. The "Relevant Headers" column shows that this signal is routed to pin 3 of the J17 header and pin 5 of the J1 header.
  • Page 18 C8051F560DK Table 12. C8051F560 Target Board Pin Assignments and Headers (Continued) MCU Pin Name Pin# Primary Alternate Fixed Target Board Relevant Headers Function Function Function P3.1 P3.1 GPIO J3[2] P3.2 P3.2 GPIO J3[3] P3.3 P3.3 GPIO J3[4] P3.4 P3.4 GPIO J3[5] P3.5...
  • Page 19 C8051F560DK 8. Schematics Rev. 0.1...
  • Page 20 C8051F560DK Rev. 0.1...
  • Page 21 C8051F560DK Rev. 0.1...
  • Page 22 C8051F560DK Rev. 0.1...
  • Page 23 C8051F560DK OTES Rev. 0.1...

  • Page 24: Contact Information

    Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per- sonal injury or death may occur.

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