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Virtex-5 SXT
User manual
Xilinx Virtex-5 SXT User Manual
Fpga prototype platform
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Contents
Table of Contents
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Table of Contents
Table of Contents
Preface: about this Guide
Additional Documentation
Additional Support Resources
Typographical Conventions
Online Document
Overview
Features
Package Contents
Additional Information
Block Diagram
Related Xilinx Documents
Detailed Description
Power Switch
Power Supply Jacks
Configuration Ports
JTAG Chain
JTAG Termination Header
Upstream/Downstream Connectors
Prototyping Area
VCCO-Enable Supply Jumpers
Vbatt
Oscillator Sockets
Differential Clock Inputs
DUT Socket
Pin Breakout
User Leds (Active-High)
PROGRAM Switch
RESET Switch (Active-Low)
Done Led
Init Led
Platform Flash ISPROM
SPI Interface
BPI Interface
GTP/GTX Transceiver Clocks to SMA
Configuration Mode Pins
References
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Virtex-5
Virtex-5 LXT/SXT/FXT
LXT/SXT/FXT
FPGA Prototype Platform
FPGA Prototype
User Guide [optional]
User Guide
UG229 (v3.0.1) May 21, 2008 [optional]
UG229 (v3.0.1) May 21, 2008
R
P/N 0402534-03
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