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Related Manuals for Texas Instruments ADS61 Series
Summary of Contents for Texas Instruments ADS61 Series
- Page 1 ADS61xx and ADS61B23EVM User's Guide Literature Number: SLAU206B September 2007 – Revised April 2008...
- Page 2 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback...
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Page 3: Table Of Contents
Contents ..........................Overview ..............ADS61xx/ADS61B23 EVM Quick-Start Procedure ....................... Circuit Description ....................... Schematic Diagram ..................... ADC Circuit Function ....................TI ADC SPI Control Interface ................Installing the ADC SPI Control Software ................Setting Up the EVM for ADC SPI Control ................ - Page 4 www.ti.com List of Figures ................... TI ADC SPC Interface Screen ......................Top Silkscreen ......................Component Side ......................Ground Plane 1 ......................Power Plane 1 ......................... Bottom Side ....................EVM Schematic, Sheet 1 ....................EVM Schematic, Sheet 2 ....................EVM Schematic, Sheet 3 ....................
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Page 5: Overview
User's Guide SLAU206B – September 2007 – Revised April 2008 Overview This user's guide gives a general overview of the evaluation module (EVM) and provides a general description of the features and functions to be considered while using this module. This manual is applicable to the ADS6122, ADS6123, ADS6124, ADS6125, ADS6142, ADS6143, ADS6144, ADS6145, and ADS61B23, which collectively are referred to as ADS61xx and ADS61B23. -
Page 6: Circuit Description
Circuit Description www.ti.com Circuit Description Schematic Diagram The schematic diagram for the EVM is in Section 6.3. ADC Circuit Function The following sections describe the function of individual circuits. See the relevant data sheet for device operating characteristics. 2.2.1 ADC Operational Mode By default, the ADC is configured to operate in parallel-mode operation, because jumper (J3) asserts a 3.3-V state to the ADC reset pin. - Page 7 Circuit Description www.ti.com Note that the THS4509 used on this EVM is pinout compatible with the THS4508, THS4511, THS4513, and THS4520. Users can easily interchange the amplifier on this EVM and pick the appropriate amplifier based on common-mode range, power supplies, and frequency of operation. Contact your local Texas Instruments (TI) sales representative for assistance in selection of these amplifiers.
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Page 8: Breakout Board Pin Assignments
Circuit Description www.ti.com Table 1. Breakout Board Pin Assignments ADS6122/23/B23/24/25 J4 PIN ADS6142/43/44/45 DESCRIPTION DESCRIPTION Data bit 0 (LSB) Data bit 1 Data bit 0 (LSB) Data bit 2 Data bit 1 Data bit 3 Data bit 2 Data bit 4 Data bit 3 Data bit 5 Data bit 4... -
Page 9: Surface-Mount Jumpers
Circuit Description www.ti.com Table 2. Jumpers Description Reference Designator Default Selection Optional Selection Parallel mode: SEN pin 5–6, Offset binary, CMOS output Multiple choices voltage bias SEN control 2–3, EVM controlled 1–2, USB or FPGA controlled ADC control mode 2–3, Parallel mode 1–2, serial mode Parallel mode: SCLK pin 1–2, 0-dB Gain, Int Ref... -
Page 10: Ti Adc Spi Control Interface
TI ADC SPI Control Interface www.ti.com TI ADC SPI Control Interface This section describes the software features accompanying the EVM kit. The TI ADC SPI control software provides full control of the SPI interface, allowing users to write to any of the ADC registers found in the ADC data sheet. -
Page 11: Setting Up The Evm For Adc Spi Control
TI ADC SPI Control Interface www.ti.com Setting Up the EVM for ADC SPI Control Users who wish to use the ADC SPI interface must supply 5 VDC to J20, which provides power to the USB circuit. By default, the EVM comes with the ADC configured in parallel mode. In order to use the SPI interface to control the ADC modes of operation, users must move several jumpers. -
Page 12: Ads61Xx Frequently Used Registers
TI ADC SPI Control Interface www.ti.com Table 4. ADS61xx Frequently Used Registers Default Value Alternate Value ADS61xx Reset 2s Complement Straight Binary CMOS DDR LVDS Powerdown: OFF Powerdown On No Course Gain 3.5-dB Course Gain INT Reference EXT Reference Bit-Wise (LVDS Only) Byte-Wise Test Mode: None Multiple Options... -
Page 13: Connecting To Fpga Platforms
Connecting to FPGA Platforms www.ti.com Connecting to FPGA Platforms The ADS61xx/ADS61B23 EVM provides several connection options to mate the EVM to various FPGA development platforms and FPGA-based capture boards. TSW1100 Using the accompanying CMOS breakout board, users can easily mate TI's TSW1100 capture board to the ADS61xx/ADS61B23 EVM. -
Page 14: Adc Evaluation
ADC Evaluation www.ti.com ADC Evaluation This section describes how to set up a typical ADC evaluation system that is similar to what TI uses to perform testing for data-sheet generation. Consequently, the information in this section is generic in nature and is applicable to all high-speed, high-resolution ADC evaluations. -
Page 15: Coherent Input Frequency Selection
ADC Evaluation www.ti.com Coherent Input Frequency Selection Typical ADC analysis requires users to collect the resulting time-domain data and perform a Fourier transform to analyze the data in the frequency domain. A stipulation of the Fourier transform is that the signal must be continuous-time;... -
Page 16: Physical Description
Physical Description www.ti.com Physical Description This section describes the physical characteristics and PCB layout of the EVM. PCB Layout The EVM is constructed on a four-layer, 0.062-inch thick PCB using FR-4 material. The individual layers are shown in Figure 2 through Figure 6. -
Page 17: Component Side
Physical Description www.ti.com Figure 3. Component Side SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 18: Ground Plane
Physical Description www.ti.com Figure 4. Ground Plane 1 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 19: Power Plane
Physical Description www.ti.com Figure 5. Power Plane 1 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 20: Bottom Side
Physical Description www.ti.com Figure 6. Bottom Side SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 21: Bill Of Materials
Physical Description www.ti.com Bill of Materials Table 5. Bill of Materials Reference Part Foot Print Part Number Manufacturer Installed 33 µF C1, C5, C8, C52, TANT_B B45196H2336M209 Kemet 10 µF C2, C9, C30, C56, ECJ-2FB0J106K Panasonic 1 µF C3, C6, C31 ECJ-1VB1A105K Panasonic 0.1 µF... - Page 22 Physical Description www.ti.com Table 5. Bill of Materials (continued) Reference Part Foot Print Part Number Manufacturer Installed 200 Ω ERJ-2RKF2000X Panasonic installed 348 Ω R36, R48 ERJ-3EKF3480V Panasonic 499 Ω R37, R45 ERJ-3EKF4990V Panasonic installed 69.8 Ω R39, R43 ERJ-3EKF69R8V Panasonic 200 Ω...
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Page 23: Evm Schematics
Physical Description www.ti.com EVM Schematics Figure 7. EVM Schematic, Sheet 1 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 24: Evm Schematic, Sheet
Physical Description www.ti.com Figure 8. EVM Schematic, Sheet 2 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 25: Evm Schematic, Sheet
Physical Description www.ti.com Figure 9. EVM Schematic, Sheet 3 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 26: Evm Schematic, Sheet
Physical Description www.ti.com D12_D13_P D12_D13_M D10_D11_P D10_D11_M D8_D9_P D8_D9_M CLKOUTP CLKOUTM CDC_CLKP CDC_CLKM D6_D7_P D6_D7_M D4_D5_P D4_D5_M D2_D3_P D2_D3_M D0_D1_P D0_D1_M FPGA_SEN FPGA_SDATA SH2 FPGA_SCLK CONN_QTH_30X2-D-A CONN_QTH_30X2-D-A Figure 10. EVM Schematic, Sheet 4 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 27: Evm Schematic, Sheet
Physical Description www.ti.com Figure 11. EVM Schematic, Sheet 5 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 28: Breakout Board Schematic, Sheet
Physical Description www.ti.com CONN_QSH_30X2-D-A CONN_QSH_30X2-D-A 40PIN IDC 40PIN IDC DATA_OUT DATA_OUT Figure 12. Breakout Board Schematic, Sheet 6 SLAU206B – September 2007 – Revised April 2008 Submit Documentation Feedback... -
Page 29: Evaluation Board/Kit Important Notice
EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. -
Page 30: Important Notice
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. - Page 31 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments ADS6125EVM ADS6124EVM ADS6142EVM...
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