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This user's guide describes the characteristics, operation, and use of the ADS8568EVM-PDK. This
Performance Demonstration Kit (PDK) is an evaluation platform for the ADS8568, a 16-bit, eight-channel,
simultaneous sampling, bipolar input analog-to-digital converter (ADC). The ADS8568EVM-PDK allows
evaluation of all aspects of the ADS8568 device. This document includes an EVM QuickStart, hardware
and software details, bill of materials, and schematic.
ADCPro is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.
SBAU193B – July 2011 – Revised July 2013
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Figure 1. ADS8568EVM-PDK
Copyright © 2011–2013, Texas Instruments Incorporated
User's Guide
SBAU193B – July 2011 – Revised July 2013
ADS8568EVM-PDK
ADS8568EVM-PDK
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Summary of Contents for Texas Instruments ADS8568EVM
- Page 1 ADS8568EVM-PDK Figure 1. ADS8568EVM-PDK This user's guide describes the characteristics, operation, and use of the ADS8568EVM-PDK. This Performance Demonstration Kit (PDK) is an evaluation platform for the ADS8568, a 16-bit, eight-channel, simultaneous sampling, bipolar input analog-to-digital converter (ADC). The ADS8568EVM-PDK allows evaluation of all aspects of the ADS8568 device.
- Page 2 Contents ....................... EVM Overview ........................QuickStart ......................Quick Reference ..............Using the ADS8568EVM-PDK Plug-In in ADCPro .................. ADS8568EVM-PDK Hardware Details ................Bill of Materials, Layout, and Schematic List of Figures ......................ADS8568EVM-PDK ................. ADS8568EVM Default Jumper Settings ....................Operation in Hardware Mode ....................
- Page 3 EVM Overview The ADS8568EVM is an evaluation module (EVM) built to the TI Modular EVM System specification. It can be connected to any of the modular EVM system interface cards available from Texas Instruments. The ADS8568EVM is available as part of the ADS8568EVM-PDK, which includes an MMBInterface motherboard and software.
- Page 4 A silkscreen detailing the default jumper settings is shown in Figure Table 2 explains the configuration for these jumpers. Figure 2. ADS8568EVM Default Jumper Settings ADS8568EVM-PDK SBAU193B – July 2011 – Revised July 2013 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 5 Short 1-2 ±HVINT (±14 V) onboard supply on ADS8568EVM-PDK Kit Operation To prepare to evaluate the ADS8568 with the ADS8568EVM-PDK, complete the following steps: 1. Verify the jumpers on the ADS8568EVM are as shown in Figure 2 (note that these settings are the factory-configured settings for the EVM).
- Page 6 The ADS8568 may output the conversion results using a serial or parallel interface. The ADS8568EVM may be set in parallel or serial mode through jumper JP22 and may be configured in hardware or software control mode through jumper JP16.
- Page 7 The ADS8568EVM-PDK plug-in may be used in Hardware mode or Software mode. The user can adjust the ADS8568EVM settings when not acquiring data. During acquisition, all controls are disabled and settings may not be changed. When a setting is changed on the ADS8568EVM plug-in, the setting immediately updates on the board.
- Page 8 Using the ADS8568EVM-PDK Plug-In in ADCPro www.ti.com Figure 3. Operation in Hardware Mode ADS8568EVM-PDK SBAU193B – July 2011 – Revised July 2013 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 9 Using the ADS8568EVM-PDK Plug-In in ADCPro www.ti.com 4.1.2 Operation in Software Mode For proper operation in software mode, the user selects Software mode by clicking on the Mode panel. Jumper JP16 must be open, as shown in Figure Figure 4. Operation in Software Mode When using the internal reference, the user must verify that jumper JP12 is open and select Internal in the Vref Source control.
- Page 10 Powerdown panel provided. The user may input the desired sampling rate on the Data Rate panel. The data rate is limited by the ADS8568EVM plug-in software to a maximum of 400 kSPS. The conversion results are available on connector J5.
- Page 11 If the onboard REF5025 2.5-V reference is desired, the internal reference must first be disabled (in hardware mode, J21 must be shunted to disable the reference). The ADS8568EVM provides an onboard 2.5-V reference via U7. To use the REF5025 reference, a shunt jumper must be placed on JP12.
- Page 12 ADS8568EVM-PDK Hardware Details www.ti.com Power Supplies The ADS8568EVM-PDK is configured at the factory with an on-board bipolar analog input ±14.5 V switching supply (±HV), a +5-V AV analog supply, and either a +5 BV or +3.3 V supply. For ADS8568EVM stand-alone operation, power sources can be applied through connector J3 on the board.
- Page 13 Digital Power: Buffer I/O Supply The buffer I/O supply of the ADS8568EVM-PDK is provided through connector J3. Connector J3 has a +3.3-V and +5-V digital supply defined on pins 9 and 10, respectively. Jumper JP4 on the EVM allows the user to select the default +5.5 V or 3.3 V for the device BV...
- Page 14 Bill of Materials, Layout, and Schematic www.ti.com Digital Controls: J4 and J5 The digital inputs and outputs of the EVM are provided through connectors J4 and J5. The ADS8568EVM- PDK plug-in supports the parallel interface of operation. 5.4.1 Parallel Control: Connector J4 Connector J4 contains parallel control signals such as write enable and read enable.
- Page 15 4-pin, triple row, header (12 posible) Samtec TSW-104-07-T-T JP12, JP15-JP17, JP21, JP22 2-pin, 0.1-inch header Samtec TSW-102-07-T-S L1, L2 Power inductors, 5.3 µH, 1.90 A Sumida CDRH5D28NP-5R3NC SBAU193B – July 2011 – Revised July 2013 ADS8568EVM-PDK Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 16 IC, precision, VREF, 2.5 V, LN/LD, MSOP REF5025AIDGKT IC, converting, DC/DC, pos/neg, 24-QFN TPS65131RGER 0.100, shunt—black shunts 969102-0000-DA 2-mm shunt Samtec 2SN-BK-G ADS8568EVM-PDK SBAU193B – July 2011 – Revised July 2013 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 17 Layout Figure 8 through Figure 12 show the PCB layout of the ADS8568EVM (not to scale). Figure 8. ADS8568EVM: Silkscreen (Top Layer) Figure 9. ADS8568EVM: Top Figure 10. ADS8568EVM: Internal GND Layer 1 Figure 11. ADS8568EVM: Internal Layer 2 SBAU193B –...
- Page 18 Bill of Materials, Layout, and Schematic www.ti.com Figure 12. ADS8568EVM: Silkscreen (Bottom Layer) Schematic Figure 13 Figure 14 show complete schematics for the ADS8568EVM. ADS8568EVM-PDK SBAU193B – July 2011 – Revised July 2013 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 19 DVDD AVDD JP10 JP11 +5VD TP11 10uF TP10 0.1uF 10uF 10uF 10uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF Figure 13. ADS85x8EVM: Schematic 1 SBAU193B – July 2011 – Revised July 2013 ADS8568EVM-PDK Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 20 VREF -HVINT PGND VNEG JP20 OUTN OUTN -VIN 0.1uF MBRM120 4.7uF 4.7uF 4.7uF 4.7uF TPS65131RGE 4.7uF CDRH5D28NP-5R3NC Figure 14. ADS85x8EVM: Schematic 2 ADS8568EVM-PDK SBAU193B – July 2011 – Revised July 2013 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated...
- Page 21 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 22 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 23 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 24 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated...
- Page 25 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
- Page 26 Authorized Distribution Brand： Website： Welcome to visit www.ameya360.com Contact Us： Address： 401 Building No.5, JiuGe Business Center, Lane 2301, Yishan Rd Minhang District, Shanghai , China Sales： Direct +86 (21) 6401-6692 Email amall@ameya360.com 800077892 Skype ameyasales1 ameyasales2 Customer Service： Email service@ameya360.com Partnership：...
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