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NXP Semiconductors PN7160 Settings Manual

NXP Semiconductors PN7160 Settings Manual

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AN13218
PN7160 RF settings guide
Rev. 1.4 — 31 July 2024
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Keywords
Abstract
Content
NFC, PN7160, NCI, RF settings
This document provides further information about the PN7160 RF settings and offers guidelines to
tune them to optimize RF performances according to the PN7160 integration.
Application note

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  • Page 1 Rev. 1.4 — 31 July 2024 Application note Document information Information Content Keywords NFC, PN7160, NCI, RF settings Abstract This document provides further information about the PN7160 RF settings and offers guidelines to tune them to optimize RF performances according to the PN7160 integration.

  • Page 2: Introduction

    PN7160 RF settings guide 1 Introduction PN7160 offers a lot of physical registers to allow the Device Host (DH) to configure PN7160 in its system environment. From a system point of view, these registers are viewed as parameters with a dedicated address and programmable value, which, when opened to the user, can be addressed through NCI protocol (see [1]) via the physical connection.

  • Page 3: Nci Command Structure

    2 NCI command structure 2.1 Register setting command The NCI command syntax is based on the TLV (Tag, Length, Value) mechanism as described in the PN7160 User manual [2]. According to the NCI 2.0 specification [1], the parameter space related to proprietary command use starts from the NXP proprietary extension Tag 0xA0.

  • Page 4: Rf Transitions

    Target SetProtocol(Target) Figure 1. RF transitions diagram PN7160 can go to different states, but cannot jump to a state to which no link is defined, which makes the solution more robust. The transitions are defined as below: AN13218 All information provided in this document is subject to legal disclaimers.
  • Page 5 AN13218 NXP Semiconductors PN7160 RF settings guide • BOOT – Called at boot time – Basic initialization of CLIF (for example, SMU_ANA_TX_STANDBY_REG) • INITIATOR – Called at the beginning of the reader phase – Initialization common Reader/Initiator mode settings • TARGET –...
  • Page 6 AN13218 NXP Semiconductors PN7160 RF settings guide Table 2. Transition ID values ...continued Name RF_CLIF_CFG_BR_424_I_RXB RF_CLIF_CFG_BR_212_T_RXF RF_CLIF_CFG_BR_212_I_RXF_P RF_CLIF_CFG_BR_424_I_RXF_P RF_CLIF_CFG_BR_106_I_RXA_A RF_CLIF_CFG_BR_848_T_TXA RF_CLIF_CFG_BR_106_I_TXA RF_CLIF_CFG_BR_212_I_TXA RF_CLIF_CFG_BR_424_I_TXA RF_CLIF_CFG_BR_848_I_TXA RF_CLIF_CFG_BR_106_I_TXB RF_CLIF_CFG_BR_212_I_TXB RF_CLIF_CFG_BR_424_I_TXB RF_CLIF_CFG_BR_212_I_TXF RF_CLIF_CFG_BR_424_I_TXF RF_CLIF_CFG_BR_106_T_TXA_A RF_CLIF_CFG_BR_212_T_TXF_A RF_CLIF_CFG_BR_424_T_TXF_A The registers can be one to four bytes long. As an example,...

  • Page 7: Pn7160 Rf Settings Command Builder

    AN13218 NXP Semiconductors PN7160 RF settings guide 3 PN7160 RF Settings Command Builder NXP offers a tool, which may help to create a dedicated NCI command. The tool is available under [3]. Figure 3. PN7160 RF Settings Command Builder The tool contains most of the relevant RF registers and its output is in "MCUXpresso" or "Android" NCI format.
  • Page 8 AN13218 NXP Semiconductors PN7160 RF settings guide A dedicated NCI command is directly generated based on the registers default values described in Section 4.1. See an example in Figure 4 Figure 4. NCI command based on the default value AN13218 All information provided in this document is subject to legal disclaimers.
  • Page 9 AN13218 NXP Semiconductors PN7160 RF settings guide The tool also offers putting a custom register value as shown below. Then, the NCI command is generated based on the "custom" entered register value. See an example in Figure 5. Keep in mind that some register values must not be changed.

  • Page 10: Register Settings Configuration

    AN13218 NXP Semiconductors PN7160 RF settings guide 4 Register settings configuration 4.1 Registers default values RF settings influence the performance of the system in reader or card emulation mode by changing the phase, amplitude, and shaping of the TX and RX path signal. Their default value and the way to optimize them are strongly dependent on the type of antenna used (size, topology, characteristics) and the design of the matching/ tuning network.

  • Page 11: Configuring Registers In Card Mode

    AN13218 NXP Semiconductors PN7160 RF settings guide 5 Configuring registers in card mode The following registers with different transitions ID, improve the card emulation mode performance in type A, B, and F, by influencing the load modulation amplitude (LMA) and the sidebands levels on the TX signal path.

  • Page 12: Card Mode Alm Phase

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.2 Card mode ALM phase 5.2.1 Register definition The card mode ALM phase is the first parameter to configure in order to adjust the DLL clock phase offset between the RX and TX paths.

  • Page 13: Measurement Example

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.2.3 Measurement example The graphs below show a selection of measurements done on a reference design. The best sine wave allows selecting the right clock phase. Figure 6. Example of correct EMVCo waveforms AN13218 All information provided in this document is subject to legal disclaimers.
  • Page 14 AN13218 NXP Semiconductors PN7160 RF settings guide Figure 7. Example of bad EMVCo waveforms AN13218 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Application note Rev. 1.4 — 31 July 2024...

  • Page 15: Clif_Ana_Tx_Amplitude_Reg

    (maximum impedance), and vice versa (note that value 0000b shall not be used.). [9:8] adjust the load modulation amplitude by choosing the amplitude of the output signal generated at PN7160 TX pin (it is recommended to use the maximum value 00b).

  • Page 16: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.3.2 Register setting procedure • Adjusting CW GSN to get optimal field strength (best RX sensitivity) Parameter: TX_GSN_CW_CM Value range: 1h to Fh Measurement process: 1. Run EMVCo CA121 (or NFC Forum 9.1.2.1 Modulation Polling Device to Listening Device at Limit Condition - NFC-A poller 0) test @ 4 cm (or 5 cm if no proven results) 2.

  • Page 17: Measurement Examples

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.3.3 Measurement examples The graphs below show a selection of measurements regarding distance, MinPowerLevel, and LMA. The best [CW, MOD] can be selected accordingly: [CW, MOD] = (1,6), but a range within (1,6)(1,6) can be considered in case of interoperability issues.

  • Page 18: Schematics Providing Principle

    AN13218 NXP Semiconductors PN7160 RF settings guide Figure 10. Example of LMA results 5.3.4 Schematics providing principle Figure 11. TX_GSN_CW_CM / TX_GSN_MOD_CM principle AN13218 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved.
  • Page 19 AN13218 NXP Semiconductors PN7160 RF settings guide Figure 12. Settings principle optimal R1 Figure 13. Settings principle optimal R2 AN13218 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Application note Rev. 1.4 — 31 July 2024...
  • Page 20 AN13218 NXP Semiconductors PN7160 RF settings guide Figure 14. TX_CW_AMPLITUDE_ALM_CM principle Figure 15. Settings applied during the CW and MOD phases AN13218 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Application note Rev.

  • Page 21: Clif_Transceive_Control_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.4 CLIF_TRANSCEIVE_CONTROL_REG 5.4.1 Register definition CLIF_TRANSCEIVE_CONTROL_REG can be adjusted to meet FDT requirement. Table 7. CLIF_TRANSCEIVE_CONTROL_REG register for card mode Register name Transition ID Register Address CLIF_TRANSCEIVE_CONTROL_REG 0x24 0x03 Table 8. CLIF_TRANSCEIVE_CONTROL_REG register setting for card mode...

  • Page 22: Clif_Ana_Nfcld_Reg

    CLIF_ANA_NFCLD_REG can be adjusted to define the RF level detector level, i.e. the level of the external RF field seen by PN7160. Indeed, in some cases, the external RF field might not be fully turned OFF, and still detected to be present.

  • Page 23: Agc_Input_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.6 AGC_INPUT_REG When a signal is present at the RX level, the AGC regulates the signal at a certain level Vref. To improve the convergence of the AGC, a starting point can be defined on the AGC_INPUT_REG.

  • Page 24: Card Mode Settings In Device Off

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.7 Card Mode settings in DEVICE OFF For devices using an Xtal to provide the clock for the NFC chip, the card mode settings are the same for DEVICE ON and DEVICE OFF operation.
  • Page 25 AN13218 NXP Semiconductors PN7160 RF settings guide Table 13. CLK_MAN value YY Value TxLDO 0° 45° 90° 135° 180° 225° 270° 315° The third parameter that can impact the performance in card mode is the TX driver used to transmit the response during device off operation.

  • Page 26: Clif_Ana_Rx_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 5.8 CLIF_ANA_RX_REG 5.8.1 Register definition CLIF_ANA_RX_REG can be fine-tuned to improve the analog down-sampling and baseband amplification of the card response before it is processed by the digital block. Table 14. CLIF_ANA_RX_REG address Register name...
  • Page 27 AN13218 NXP Semiconductors PN7160 RF settings guide Table 15. CLIF_ANA_RX_ REG register Symbol Description [31:10] Internal use Must not be modified Lower Corner Frequency: 00->45kHz, [9:8] RX_HPCF 01->85kHz, 10->150kHz, 11->250kHz Gain Adjustment BBA: 00->18 dB, 01->26 dB, 10->32 dB, [6:4] RX_GAIN_Q 11->39 dB...

  • Page 28: Configuring Registers In Reader Mode

    AN13218 NXP Semiconductors PN7160 RF settings guide 6 Configuring registers in reader mode 6.1 Pulse shape definitions 6.1.1 Type A Figure 17. Pulse shape Type A in EMVCo The time t1-t2 describes the time span in which the signal falls from 90% down below 5% of the signal amplitude.

  • Page 29: Type B

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.1.2 Type B Figure 18. Pulse shape Type B in EMVCo V1 is the initial value measured immediately before any modulation is applied by the reader while V2 is the lower value. The modulation index (mi), V3 and V4 are defined as follows: •...

  • Page 30: Clif_Ana_Tx_Amplitude_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.2 CLIF_ANA_TX_AMPLITUDE_REG 6.2.1 Register definition CLIF_ANA_TX_AMPLITUDE_REG is the register to configure several parameters of the transmission in reader mode. Table 17. CLIF_ANA_TX_AMPLITUDE_REG address Register name Register Address CLIF_ANA_TX_AMPLITUDE_REG 0x42 Table 18. CLIF_ANA_TX_AMPLITUDE_REG register for reader mode...
  • Page 31 AN13218 NXP Semiconductors PN7160 RF settings guide Table 20. CLIF_ANA_TX_AMPLITUDE_REG register TX_CW_AMPLITUDE_ALM_CM field Symbol Description Set amplitude of unmodulated carrier @ reader mode [00] => Amplitude is TVDD – 150 mV [01] => Amplitude is [13:12] TX_CW_AMPLITUDE_ALM_CM TVDD – 250 mV [10] => Amplitude is TVDD – 500 mV [11] =>...

  • Page 32: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.2.2 Register setting procedure • Adjusting TX_RESIDUAL_CARRIER Parameter: TX_RESIDUAL_CARRIER. Values: 60h, 70h, 80h, 90h, A0, B0, C0, C8. Measurement process: 1. Use a PICC card and an oscilloscope to observe the modulation index Type B @ 0 cm, then 1 cm. Both must meet the standard.

  • Page 33: Clif_Ana_Tx_Shape_Control_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.3 CLIF_ANA_TX_SHAPE_CONTROL_REG 6.3.1 Register definition CLIF_ANA_TX_SHAPE_CONTROL_REG can be used to shape the TX transmission signal, by adjusting its rising/falling edge. Table 22. CLIF_ANA_TX_SHAPE_CONTROL_REG address Register name Register Address CLIF_ANA_TX_SHAPE_CONTROL_REG 0x4A Table 23. CLIF_ANA_TX_SHAPE_CONTROL_REG register Symbol...

  • Page 34: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.3.2 Register setting procedure • Adjusting TX_SET_TAU_MOD_RISING Parameter: TX_SET_TAU_MOD_RISING. Values: 0h to Fh Measurement process: 1. Use oscilloscope and zoom as depicted in the picture below. Target: 1. Select settings for which the timing meets the specification.
  • Page 35 AN13218 NXP Semiconductors PN7160 RF settings guide • Adjusting Residual Carrier With the TX shaping, the overshoot at the end of the pulse can be reduced. The TX SC shaping can be enabled with the bit TX_BYPASS_SC_SHAPING, which must be set to 0h (= disable the bypass).

  • Page 36: Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.4 CLIF_ANA_TX_UNDERSHOOT_CONFIG_REG 6.4.1 Register definition CLIF_TX_UNDERSHOOT_CONFIG_REG can be used to shape the TX transmission signal, by adjusting the undershoot pattern. Table 25. CLIF_TX_UNDERSHOOT_CONFIG_REG address Register name Register Address CLIF_TX_UNDERSHOOT_CONFIG_REG 0x16 Table 26. CLIF_TX_UNDERSHOOT_CONFIG_REG register Symbol...

  • Page 37: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.4.2 Register setting procedure • Adjusting TX_UNDERSHOOT_CONFIG_REG The undershoot protection must be enabled with TX_UNDERSHOOT_PROT_ENABLE (bit 0) in the TX_UNDERSHOOT_CONFIG register. Parameter: TX_UNDERSHOOT_PATTERN. Values: 0h to Fh Measurement process: 1. Use oscilloscope and zoom as depicted in the picture below.

  • Page 38: Clif_Ana_Rx_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.5 CLIF_ANA_RX_REG 6.5.1 Register definition Refer to Section 5.8.1 for CLIF_ANA_RX_REG register definition. Table 28. CLIF_ANA_RX_ REG transitions for reader mode Technology Baud rate Transition ID 15693 0x20 0x3C 0x3E type A 0x40 0x42...

  • Page 39: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.5.2 Register setting procedure Parameter: RX_HPCF Values: 0h to 3h Measurement process: 1. Use MIFARE DESFire EV1, MIFARE Ultralight UL, TOPAZ, and measure distance (see Section Target: 1. Select settings for which distance is improved.

  • Page 40: Clif_Sigpro_Rm_Config1_Reg

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.6 CLIF_SIGPRO_RM_CONFIG1_REG 6.6.1 Register definition CLIF_SIGPRO_RM_CONFIG1_REG can be used to tune the digital signal processing regarding the bit and subcarrier detection for the down-sampled and amplified card mode response. The configuration of this register must be done when the best configuration of CLIF_ANA_RX_REG has been found.

  • Page 41: Register Setting Procedure

    AN13218 NXP Semiconductors PN7160 RF settings guide 6.6.2 Register setting procedure Parameter: MIN_LEVEL. Values: 0h to Fh Measurement process: 1. Use MIFARE DESFire EV1, MIFARE Ultralight, TOPAZ, and measure distance (see annex 1). Target: 1. Select settings for which distance is improved. Check if the logs are OK (The CORE_GENERIC_ERROR_NTF (60 07 01 a1) should not be observed).

  • Page 42: Agc_Input_Reg

    To improve RX on reader mode, the recommendation is to set the AGC value with the same value as the AGC when using LPCD with trace mode enable (set register 0xA0 40 to 0x81, see PN7160 User Manual [2]), without any card on the field.

  • Page 43: Abbreviations

    AN13218 NXP Semiconductors PN7160 RF settings guide 7 Abbreviations Table 34.  Abbr. Meaning Application Note Active Load Modulation CLIF ContactLess InterfFace Device Host Firmware Hardware I²C Inter-Integrated Circuit (serial data bus) Integrated Circuit NFC Controller Interface (NFC Forum Specification) Near Field Communication...

  • Page 44: Annex 1: Communication Distance Evaluation And Fine-Tuning

    AN13218 NXP Semiconductors PN7160 RF settings guide 8 Annex 1: Communication distance evaluation and fine-tuning 8.1 Introduction When the device is in reader mode, the communication with a tag is split in 2 parts: • Request from reader to tag •...

  • Page 45: Way Of Working

    AN13218 NXP Semiconductors PN7160 RF settings guide • Phase 2: from tag to reader Reason: The reader cannot understand the answer from the tag. Symptom: The card answer is present but not detected by the reader. How to solve: Adjust the CLIF_ANA_RX_REG and the CLIF_SIGPRO_RM_CONFIG1_REG.

  • Page 46: Step 2

    AN13218 NXP Semiconductors PN7160 RF settings guide 8.2.2 Step 2 Put the tag + spying coil close to the device to set the trigger of the scope (see figure below) to capture the card answer. The tag must be read.

  • Page 47: Step 3

    AN13218 NXP Semiconductors PN7160 RF settings guide 8.2.3 Step 3 Put the tag + spying coil far from the device then decrease the distance between the tag and the reader. When you see the answer from the tag on the scope, you find the tag answer distance.

  • Page 48: Step 5

    AN13218 NXP Semiconductors PN7160 RF settings guide 8.2.5 Step 5 Analyze the results: If tag answer distance = communication distance, the performance is limited by the TX part: To increase the communication distance: • Increase the RF field power by decreasing the tuning impedance •...

  • Page 49: Annex 2: Alm Amplitude And Tx Shaping Evaluation Using A Standard Scope

    AN13218 NXP Semiconductors PN7160 RF settings guide 9 Annex 2: ALM Amplitude and TX shaping evaluation using a standard Scope In case the EMVCo, ISO, or NFC Forum test setup is not available. A basic measurement using a standard scope can be done. See a few examples below.
  • Page 50 AN13218 NXP Semiconductors PN7160 RF settings guide To capture the Type A, the following trigger setup (**) can be used: • Single event – Polarity – negative – Width – Width 2us – +- delta 999.9ns (**) It may be different for different scope types.

  • Page 51: Annex 3: Default Pn7160 Rf Settings

    PN7160 RF settings guide 10 Annex 3: Default PN7160 RF settings Table 36 lists the Card/Listener mode registers that can be adjusted. Table 36. Default PN7160 RF settings: Adjustable Card/Listener mode registers Transition ID Register Address Value Length and Transition Name...
  • Page 52 AN13218 NXP Semiconductors PN7160 RF settings guide Table 37. Default PN7160 RF settings: Adjustable Reader/Poller mode registers ...continued Transition ID Register Address Value Length and Transition Name Description Comment Register Value (first octet = value length, following octets = register value)
  • Page 53 Card/Listener and Reader/Poller mode registers set by NXP, which must not be changed from the default value to ensure proper functionality. Table 38. Default PN7160 RF settings: Card/Listener and Reader/Poller mode registers set by NXP Transition ID Register Address...
  • Page 54 AN13218 NXP Semiconductors PN7160 RF settings guide Table 38. Default PN7160 RF settings: Card/Listener and Reader/Poller mode registers set by NXP ...continued Transition ID Register Address Value Length and Register Value (first Transition Name octet = value length, following octets = register value)
  • Page 55 AN13218 NXP Semiconductors PN7160 RF settings guide Table 38. Default PN7160 RF settings: Card/Listener and Reader/Poller mode registers set by NXP ...continued Transition ID Register Address Value Length and Register Value (first Transition Name octet = value length, following octets = register value)
  • Page 56 AN13218 NXP Semiconductors PN7160 RF settings guide Table 38. Default PN7160 RF settings: Card/Listener and Reader/Poller mode registers set by NXP ...continued Transition ID Register Address Value Length and Register Value (first Transition Name octet = value length, following octets = register value)
  • Page 57 AN13218 NXP Semiconductors PN7160 RF settings guide Table 38. Default PN7160 RF settings: Card/Listener and Reader/Poller mode registers set by NXP ...continued Transition ID Register Address Value Length and Register Value (first Transition Name octet = value length, following octets = register value)

  • Page 58: References

    User manual - UM11495 - PN7160 NFC controller (link) Software tool - PN7160 - RF Settings GUI (link) Application note - AN13892 - PN7160 frequently asked questions (link) Specification - Book D - EMV Contactless Communication Protocol, Version 2.6, March 2016 (link) AN13218 All information provided in this document is subject to legal disclaimers.

  • Page 59: Revision History

    "CLIF_ANA_RX_REG": Warning added. • Section 9 "Annex 2: ALM Amplitude and TX shaping evaluation using a standard Scope": added. • Section 10 "Annex 3: Default PN7160 RF settings" added. • Section 11 "References": Reference to AN13892 added. AN13218 v.1.2 13 September 2021 •...

  • Page 60: Legal Information

    NXP Semiconductors. In the event that customer uses the product for design-in and use in In no event shall NXP Semiconductors be liable for any indirect, incidental, automotive applications to automotive specifications and standards, punitive, special or consequential damages (including - without limitation - customer (a) shall use the product without NXP Semiconductors’...
  • Page 61 NXP accepts no liability for any vulnerability. Customer should those standards. Purchase of NXP Semiconductors IC does not include a regularly check security updates from NXP and follow up appropriately.
  • Page 62 ................43 mode ............... 27 Tab. 35. Communication distance examples ....48 Tab. 17. CLIF_ANA_TX_AMPLITUDE_REG Tab. 36. Default PN7160 RF settings: Adjustable address ............30 Card/Listener mode registers ......51 Tab. 18. CLIF_ANA_TX_AMPLITUDE_REG register Tab. 37. Default PN7160 RF settings: Adjustable for reader mode ..........30 Reader/Poller mode registers ......51...
  • Page 63 Example of transition ID ........6 Fig. 18. Pulse shape Type B in EMVCo .......29 Fig. 3. PN7160 RF Settings Command Builder .... 7 Fig. 19. Modulation index adjustment ......31 Fig. 4. NCI command based on the default value ..8 Fig.

  • Page 64: Table Of Contents

    Annex 2: ALM Amplitude and TX Configuring registers in card mode ..... 11 shaping evaluation using a standard Scope .............. 49 CLIF_TX_CONTROL_REG ......11 Annex 3: Default PN7160 RF settings ..51 Card mode ALM phase ........12 References ............58 5.2.1 Register definition ..........12 Revision history ..........59...

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