Texas Instruments ADS8684A Manual
Texas Instruments ADS8684A Manual

Texas Instruments ADS8684A Manual

16-bit, 500-ksps, 4- and 8-channel, single-supply, sar adcs with bipolar input ranges
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ADS868xA 16-Bit, 500-kSPS, 4- and 8-Channel, Single-Supply, SAR ADCs with
1 Features
16-Bit ADCs with Integrated Analog Front-End
1
4-, 8-Channel MUX with Auto and Manual Scan
Channel-Independent Programmable Inputs:
– ±10.24 V, ±5.12 V, ±2.56 V, ±1.28 V, ±0.64 V
– 10.24 V, 5.12 V, 2.56 V, 1.28 V
5-V Analog Supply: 1.65-V to 5-V I/O Supply
Constant Resistive Input Impedance: 1 MΩ
Input Overvoltage Protection: Up to ±20 V
On-Chip, 4.096-V Reference with Low Drift
Excellent Performance:
– 500-kSPS Aggregate Throughput
– DNL: ±0.5 LSB; INL: ±0.75 LSB
– Low Drift for Gain Error and Offset
– SNR: 92 dB; THD: –102 dB
– Low Power: 65 mW
AUX Input → Direct Connection to ADC Inputs
ALARM → High and Low Thresholds per Channel
SPI™-Compatible Interface with Daisy-Chain
Industrial Temperature Range: –40°C to 125°C
TSSOP-38 Package (9.7 mm × 4.4 mm)
Block Diagram
AVDD
1 M:
AIN_0P
OVP
2nd-Order
PGA
AIN_0GND
LPF
OVP
1 M:
V
B0
1 M:
AIN_1P
OVP
2nd-Order
PGA
AIN_1GND
LPF
OVP
1 M:
V
B1
1 M:
AIN_2P
OVP
2nd-Order
PGA
AIN_2GND
LPF
OVP
1 M:
V
B2
1 M:
AIN_3P
OVP
2nd-Order
PGA
AIN_3GND
LPF
OVP
1 M:
V
B3
1 M:
AIN_4P
OVP
2nd-Order
PGA
AIN_4GND
LPF
OVP
1 M:
V
B4
1 M:
AIN_5P
OVP
2nd-Order
PGA
AIN_5GND
LPF
OVP
1 M:
V
B5
1 M:
AIN_6P
OVP
2nd-Order
PGA
AIN_6GND
LPF
OVP
1 M:
V
B6
1 M:
AIN_7P
OVP
2nd-Order
PGA
AIN_7GND
LPF
OVP
1 M:
V
B7
AUX_IN
AUX_GND
AGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Sample &
Product
Buy
Folder
Bipolar Input Ranges
DVDD
ADS8688A
ADC
ADS8684A
Driver
ADC
Driver
Digital
ADC
Logic
Driver
and
CS
Interface
SCLK
ADC
Driver
SDI
SDO
16-Bit
ADC
Driver
SAR ADC
DAISY
REFSEL
ADC
Oscillator
Driver
RST / PD
ALARM
ADC
REFCAP
Driver
REFIO
ADC
Driver
4.096-V
Reference
DGND
REFGND
Tools &
Technical
Software
Documents
2 Applications
Power Automation
Protection Relays
PLC Analog Input Modules
3 Description
The ADS8684A and ADS8688A are 4- and 8-
channel, integrated data acquisition systems based
on a 16-bit successive approximation (SAR) analog-
to-digital converter (ADC), operating at a throughput
of 500 kSPS. The devices feature integrated analog
front-end circuitry for each input channel with
overvoltage protection up to ±20 V, a 4- or 8-channel
multiplexer with automatic and manual scanning
modes, and an on-chip, 4.096-V reference with low
temperature drift. Operating on a single 5-V analog
supply, each input channel on the devices can
support true bipolar input ranges of ±10.24 V,
±5.12 V, ±2.56 V, ±1.28V and ±0.64V, as well as
unipolar input ranges of 0 V to 10.24 V, 0 V to 5.12 V,
0 V to 2.56 V and 0 V to 1.28 V. The gain of the
analog front-end for all input ranges is accurately
trimmed to ensure a high dc precision. The input
range
selection
independent for each channel. The devices offer a
1-MΩ constant resistive input impedance irrespective
of the selected input range.
The ADS8684A and ADS8688A offer a simple SPI-
compatible serial interface to the digital host and also
support daisy-chaining of multiple devices. The digital
supply operates from 1.65 V to 5.25 V, enabling
direct interface to a wide range of host controllers.
Device Information
PART NUMBER
ADS868xA
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Gain Error versus Temperature
0.05
0.03
0.01
-0.01
-0.03
-0.05
±40
Support &
Reference
Community
Design
ADS8684A, ADS8688A
SBAS680 – JULY 2015
is
software-programmable
(1)
PACKAGE
BODY SIZE (NOM)
TSSOP (38)
9.70 mm × 4.40 mm
---- ± 2.5*V
---- “ 1.25*V
REF,
REF
---- “ 0.625*V
------“0.3125*V
REF,
REF
-------“0.156 V
---- + 2.5*V
REF,
REF
---- + 1.25*V
---- + 0.625*V
REF,
REF
---- + 0.3125*V
REF
26
59
92
±7
o
Free-Air Temperature (
C)
and
125
C039

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Summary of Contents for Texas Instruments ADS8684A

  • Page 1 – ±10.24 V, ±5.12 V, ±2.56 V, ±1.28 V, ±0.64 V 3 Description – 10.24 V, 5.12 V, 2.56 V, 1.28 V The ADS8684A and ADS8688A are 4- and 8- • 5-V Analog Supply: 1.65-V to 5-V I/O Supply channel, integrated data acquisition systems based •...
  • Page 2: Table Of Contents

    8.1 Overview ..............13 Mechanical, Packaging, and Orderable 8.2 Functional Block Diagram ........Information ............8.3 Feature Description..........4 Revision History DATE REVISION NOTES July 2014 Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 3: Pin Configuration And Functions

    Analog input Auxiliary input channel: positive input. Decouple with AUX_GND on pin 11. AUX_GND Analog input Auxiliary input channel: negative input. Decouple with AUX_IN on pin 10. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 4 Analog input channel 6, positive input. Decouple with AIN_6GND on pin 13. AIN_6P Analog input No connection for the ADS8684A; this pin can be left floating or connected to AGND. Analog input channel 6, negative input. Decouple with AIN_6P on pin 12. AIN_6GND Analog input No connection for the ADS8684A;...
  • Page 5: Specifications

    °C/W Junction-to-case (bottom) thermal resistance °C/W θJC(bot) (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 6: Electrical Characteristics

    (C) Typical value only for information, provided by design simulation. (2) Ideal input span, does not include gain or offset error. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 7 (3) LSB = least significant bit. (4) This parameter is the endpoint INL, not best-fit INL. (5) FSR = full-scale range. (6) Does not include the shift in offset over time. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 8 (9) Memory crosstalk is measured by applying a full-scale sinusoidal signal up to 10 kHz to a channel that is selected in the multiplexing sequence, and measuring its effect on the output of the next selected channel for all combinations of input channels. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 9 External reference voltage on 4.046 4.096 4.146 REFIO_EXT REFIO (configured as input) (10) Does not include the variation in voltage resulting from solder-shift and long-term effects. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 10 Digital output logic levels = 500-μA sink 0.2 × DVDD Floating state leakage current Only for SDO µA Internal pin capacitance TEMPERATURE RANGE Operating free-air temperature –40 °C Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 11: Timing Requirements: Serial Interface

    PH_CS SCLK D_CKCS SU_CSCK PH_CK PL_CK SCLK HT_CKDO DZ_CSDO DZ_CSDO SU_DOCK Data from sample N SU_DICK HT_CKDI SU_DSYCK HT_CKDSY DAISY Figure 1. Serial Interface Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 12: Typical Characteristics

    = ±2.5 × V range = ±1.25 × V Figure 6. DC Histogram for Mid-Scale Inputs (±2.5 × V Figure 7. DC Histogram for Mid-Scale Inputs (±1.25 × V Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 13 = ±0.15625 × V range = 0.625 × V Figure 12. DC Histogram for Mid-Scale Inputs Figure 13. DC Histogram for Mid-Scale Inputs (±0.15625 x V (0.625 x V Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 14 Codes (LSB) C020 Range = ±1.25 × V Range = ±0.625 × V Figure 18. Typical INL for All Codes Figure 19. Typical INL for All Codes Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 15 C025 C026 Range = 0.625 × V Range = 0.3125 × V Figure 24. Typical INL for All Codes Figure 25. Typical INL for All Codes Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 16 Range = 1.25 × V Range = ±0.3125 × V Figure 30. INL vs Temperature (1.25 × V Figure 31. INL vs Temperature (±0.3125 × V Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 17 C038 Range = ±2.5 × V Range = ±2.5 × V Figure 36. Typical Histogram for Offset Drift Figure 37. Offset Error vs Temperature Across Channels Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 18 SINAD = 91.2 dB, THD = 105 dB, SFDR = 107 dB Figure 42. Typical FFT Plot (±2.5 × V Figure 43. Typical FFT Plot (±1.25 × V Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 19 SINAD = 83.5 dB, THD = –103 dB, SFDR = 107 dB Figure 48. Typical FFT Plot (±0.15625 × V Figure 49. Typical FFT Plot (0.625 × V Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 20 ±40 ±7 1000 10000 Free-Air Temperature ( Input Frequency (Hz) C055 C056 = 1 kHz Figure 54. SINAD vs Temperature Figure 55. THD vs Input Frequency Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 21 Input = 2 × maximum input voltage Figure 61. AVDD Current vs Temperature for the ADS8688A Figure 60. Isolation Crosstalk vs Frequency for = 500 kSPS) Overrange Inputs Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 22 ±7 ±40 ±7 Free-Air Temperature ( Free-Air Temperature ( C075 C082 Figure 62. AVDD Current vs Temperature for the ADS8688A Figure 63. AVDD Current vs Temperature for the ADS8684A (During Sampling) = 500 kSPS) 5.75 5.25 4.75 ±40 ±7 ±40 ±7...
  • Page 23: Detailed Description

    8 Detailed Description 8.1 Overview The ADS8684A and ADS8688A are 16-bit data acquisition systems with 4- and 8-channel analog inputs, respectively. Each analog input channel consists of an overvoltage protection circuit, a programmable gain amplifier (PGA), and a second-order, antialiasing filter that conditions the input signal before being fed into a 4- or 8-channel analog multiplexer (MUX).
  • Page 24: Feature Description

    DAISY 1 M: NOTE: n = 0 to 3 for the ADS8684A and n = 0 to 7 for the ADS8688A. Figure 67. Front-End Circuit Schematic for Each Analog Input Channel The devices can support multiple unipolar or bipolar, single-ended input voltage ranges based on the configuration of the program registers.
  • Page 25: Submit Documentation Feedback

    Feature Description (continued) 8.3.3 Input Overvoltage Protection Circuit The ADS8684A and ADS8688A feature an internal overvoltage protection circuit on each of the four or eight analog input channels, respectively. Use these protection circuits as a secondary protection scheme to protect the device.
  • Page 26 Input Voltage (V) C003 C004 Figure 69. I-V Curve for an Input OVP Circuit Figure 70. I-V Curve for an Input OVP Circuit (AVDD = Floating) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 27: Analog Input Range

    In order to mitigate the noise of the front-end amplifiers and gain resistors of the PGA, each analog input channel of the ADS8684A and ADS8688A features a second-order, antialiasing LPF at the output of the PGA. The magnitude and phase response of the analog antialiasing filter are shown in...
  • Page 28 For example, the throughput per channel is equal to 250 kSPS if only two channels are selected, but is equal to 125 kSPS per channel if four channels are selected (as in the ADS8684A), and so forth. Table 6 for command register settings to switch between the auto-scan mode and manual mode for individual analog channels.
  • Page 29 3300 production devices. -0.6 -0.2 Error in REFIO Voltage (mV) C064 Figure 74. Internal Reference Accuracy at Room Temperature Histogram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 30 PCBs with surface-mount components on both sides, causes additional shifts in the output voltage. If the PCB is to be exposed to multiple reflows, solder the ADS8684A and ADS8688A in the second pass to minimize device exposure to thermal stress.
  • Page 31 For applications that require a better reference voltage or a common reference voltage for multiple devices, the ADS8684A and ADS8688A offer a provision to use an external reference along with an internal buffer to drive the ADC reference pin. In order to select the external reference mode, either tie the REFSEL pin high or connect this pin to the DVDD supply.
  • Page 32 AUX channel. Some key requirements of the driving amplifier are discussed in the Input Driver for the AUX Channel section. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 33 ADS8684A, ADS8688A www.ti.com SBAS680 – JULY 2015 The AUX channel in the ADS8684A and ADS8688A offers a true 16-bit performance with no missing codes. Some typical performance characteristics of the AUX channel are shown in Figure 81 Figure 8000 0.05 6000 -0.05...
  • Page 34 • is the noise gain of the front-end circuit, which is equal to 1 in a buffer configuration. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 35 SBAS680 – JULY 2015 8.3.10 ADC Transfer Function The ADS8684A and ADS8688A are a family of multichannel devices that support single-ended, bipolar, and unipolar input ranges on all input channels. The output of the devices is in straight binary format for both bipolar and unipolar input ranges.
  • Page 36 The ADS8684A and ADS8688A set a high alarm when the digital output for a particular channel exceeds the high alarm upper limit [high alarm threshold (T) + hysteresis (H)]. The alarm resets when the digital output for the channel is less than or equal to the high alarm lower limit (high alarm T –...
  • Page 37: Device Functional Modes

    ADS8684A, ADS8688A www.ti.com SBAS680 – JULY 2015 8.4 Device Functional Modes 8.4.1 Device Interface 8.4.1.1 Digital Pin Description The digital data interface for the ADS8684A and ADS8688A is shown in Figure SCLK SCLK ADS8684A ADS8688A RST / PD RST / PD...
  • Page 38: Device Mode

    When the RST/PD pin is pulled back to a logic high level, the devices wake-up in a default state in which the program registers are reset to their default values. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 39 8.4.1.3 Host-to-Device Connection Topologies The digital interface of the ADS8684A and ADS8688A offers a lot of flexibility in the ways that a host controller can exchange data or commands with the device. A typical connection between a host controller and a stand-...
  • Page 40 64 SCLK cycles for the entire data frame. Note that the overall throughput of the system is proportionally reduced with the number of devices connected in a daisy-chain configuration. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 41 (SDO and SCLK). This loading can lead to digital timing errors. This limitation can be overcome by using digital buffers on the shared outputs from the host controller before being fed into additional devices. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 42 8.4.2 Device Modes The ADS8684A and ADS8688A support multiple modes of operation that are software programmable. After powering up, the device is placed into idle mode and does not perform any function until a command is received from the user.
  • Page 43 SDI is Low in a Data Frame STDBY Command ± 8200h Data from Sample N Figure 96. Enter and Remain in STDBY Mode Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 44 STDBY Mode on CS Rising Edge Min width of CS HIGH = 20µs for valid sample SCLK AUTO_RST Command MAN_CH_n Command Figure 97. Exit STDBY Mode Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 45 Device exits PWR_DN Mode, but frame after recovery from waits 15ms for 16-bit settling PWR_DN mode SCLK AUTO_RST Command MAN_CH_n Command Invalid Data Figure 99. Exit PWR_DN Mode Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 46 Mode Setting AUTO_RST Mode AUTO_RST Mode (Channel sequence restarted from (Channels 0-2 are selected in sequence.) lowest count.) Figure 101. Device Operation Example in AUTO_RST Mode Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 47 (Ch 1 is selected and device continuously converts Ch 1 if NO_OP command is provided) (Transition from Ch1 to Ch 3) Figure 103. Device Operation in MAN_Ch_n Mode Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 48 Based on Previous Mode Setting MAN_Ch_n Mode AUTO_RST Mode Figure 105. Transitioning from MAN_Ch_n to AUTO_RST Mode (Channels 0 and 5 are Selected for Auto Sequence) Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 49 CS Rising Edge command or after reading frame data. SCLK Reset Program Registers (RST) ± 8500h Data from Sample N Figure 106. Reset Program Registers (RST) Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 50: Register Maps

    8.5.1 Command Register Description The command register is a 16-bit, write-only register that is used to set the operating modes of the ADS8684A and ADS8688A. The settings in this register are used to select the channel sequencing mode (AUTO_RST or MAN_Ch_n), configure the device in standby (STDBY) or power-down (PWR_DN) mode, and reset (RST) the program registers to their default values.
  • Page 51 8.5.2 Program Register Description The program register is a 16-bit register used to set the operating modes of the ADS8684A and ADS8688A. The settings in this register are used to select the channel sequence for AUTO_RST mode, configure the device ID in daisy-chain mode, select the SDO output format, control input range settings for individual channels, control the ALARM feature, reading the alarm flags, and programming the alarm thresholds for each channel.
  • Page 52 (Bits 7-0) ADDR[6:0] XXXXX 0000 000 DOUT[7:0] SCLK ADDR [6:0] X X X X X X DOUT [7:0] Figure 108. Program Register Read Cycle Timing Diagram Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 53 (2) Shading indicates bits or registers that are not included in the 4-channel version of the device. A write operation on any of these bits or registers has no effect on device behavior. A read operation on any of these bits or registers outputs all 1's on the SDO line. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 54 Ch 7 High Threshold LSB CH7_HT[7:0] Ch 7 Low Threshold MSB CH7_LT[15:8] Ch 7 Low Threshold LSB CH7_LT[7:0] COMMAND READ BACK (Read-Only) Command Read Back COMMAND_WORD[7:0] Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 55 Channel 0 enable. 0 = Channel 0 is not selected for sequencing in AUTO_RST mode 1 = Channel 0 is selected for sequencing in AUTO_RST mode Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 56 AUTO_RST sequence 1 = The analog front end on channel 0 is powered down and channel 0 cannot be included in the AUTO_RST sequence Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 57 0111 = Channel 7 (valid only for the ADS8688A) Two bits of device address (mainly useful in daisy-chain mode). Three LSB bits of input voltage range (see the Range Select Registers section). Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 58 5, address 0Bh corresponds to channel 6, and address 0Ch corresponds to channel 7. These registers allow the selection of input ranges for all individual channels (n = 0 to 3 for the ADS8684A and n = 0 to 7 for the ADS8688A). The default value for these registers is 00h.
  • Page 59 0 = No alarm detected Tripped Alarm Flag Ch4 1 = Alarm detected Tripped Alarm Flag Ch3 Tripped Alarm Flag Ch2 Tripped Alarm Flag Ch1 Tripped Alarm Flag Ch0 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 60 Each individual bit indicates an active high or low alarm flag status for each channel, as per the alarm flags register for channels 0 to 7. 0 = No alarm detected 1 = Alarm detected Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 61 Each individual bit indicates an active high or low alarm flag status for each channel, as per the alarm flags register for channels 0 to 7. 0 = No alarm detected 1 = Alarm detected Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 62 8.5.2.3.5 Alarm Threshold Setting Registers The ADS8684A and ADS8688A feature individual high and low alarm threshold settings for each channel. Each alarm threshold is 16 bits wide with 8-bit hysteresis, which is the same for both high and low threshold settings.
  • Page 63 R/W-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 21. Channel n Hysteresis Register Field Descriptions (n = 0 to 7 for the ADS8688A; n = 0 to 3 for the ADS8684A) Field Type...
  • Page 64 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 23. Channel n High Threshold LSB Register Field Descriptions (n = 0 to 7 for the ADS8688A; n = 0 to 3 for the ADS8684A) Field...
  • Page 65 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 25. Channel n Low Threshold MSB Register Field Descriptions (n = 0 to 7 for the ADS8688A; n = 0 to 3 for the ADS8684A) Field...
  • Page 66: Application And Implementation

    9.1 Application Information The ADS8684A and ADS8688A devices are fully-integrated data acquisition systems based on a 16-bit SAR ADC. The devices include an integrated analog front-end for each input channel and an integrated precision reference with a buffer.
  • Page 67 ±10.24 V with a single 5-V supply and provides minimum latency in data output resulting from the SAR architecture. The integration offered by this device makes the ADS8684A and ADS8688A an ideal selection for such applications, because the integrated signal conditioning helps minimize system components and avoids the need for generating high-voltage supply rails.
  • Page 68 C lines for the TCA6408A. The TCA6408A controls the low R opto-switch (TLP3123) that is used to switch between voltage-to-current input modes. The input channel configuration is done in microcontroller firmware. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 69: Power-Supply Recommendations

    Input Frequency (MHz) C063 C062 Code output near 32,769 Code output near 32,768 Figure 126. PSRR Without a Decoupling Capacitor Figure 127. PSRR With a Decoupling Capacitor Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 70: Layout

    Using a single dedicated ground plane is strongly encouraged. • Power sources to the ADS8684A and ADS8688A must be clean and well-bypassed. TI recommends using a 1-μF, X7R-grade, 0603-size ceramic capacitor with at least a 10-V rating in close proximity to the analog (AVDD) supply pins.
  • Page 71: Layout Example

    16: AIN_0P 23: AIN_3P 17: AIN_0GND 22: AIN_3GND 18: AIN_1P 21: AIN_2P 19: AIN_1GND 20: AIN_2GND Analog Pins Figure 128. Board Layout for the ADS8684A and ADS8688A Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 72: Device And Documentation Support

    All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 73: Mechanical, Packaging, And Orderable Information

    This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: ADS8684A ADS8688A...
  • Page 74 Op Temp (°C) Device Marking Samples Drawing (4/5) ADS8684AIDBT ACTIVE TSSOP Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS8684A & no Sb/Br) ADS8684AIDBTR ACTIVE TSSOP 2000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ADS8684A & no Sb/Br)
  • Page 75 PACKAGE OPTION ADDENDUM www.ti.com 21-Jul-2015 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
  • Page 76 PACKAGE MATERIALS INFORMATION www.ti.com 21-Jul-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) ADS8684AIDBTR TSSOP 2000 330.0 16.4 10.2 12.0 16.0 ADS8688AIDBTR TSSOP...
  • Page 77 PACKAGE MATERIALS INFORMATION www.ti.com 21-Jul-2015 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) ADS8684AIDBTR TSSOP 2000 367.0 367.0 38.0 ADS8688AIDBTR TSSOP 2000 367.0 367.0 38.0 Pack Materials-Page 2...
  • Page 80: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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