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RG650E&RG650V Series QuecOpen Hardware Design 5G Module Series Version: 1.0 Date: 2024-01-29 Status: Released...
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5G Module Series At Quectel, our aim is to provide timely and comprehensive services to our customers. If you require any assistance, please contact our headquarters: Quectel Wireless Solutions Co., Ltd. Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District,...
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Privacy Policy To implement module functionality, certain device data are uploaded to Quectel’s or third-party’s servers, including carriers, chipset suppliers or customer-designated servers. Quectel, strictly abiding by the relevant laws and regulations, shall retain, use, disclose or otherwise process relevant data for the purpose of performing the service only or as permitted by applicable laws.
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Manufacturers of the terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.
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5G Module Series About the Document Revision History Version Date Author Description Iris MA/ 2023-04-18 Qiqi WANG/ Creation of the document Kun GE Iris MA/ Qiqi WANG/ 2024-01-29 First official release Aragorn QIAO Kun GE RG650E&RG650V_Series_QuecOpen_Hardware_Design 4 / 125...
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5G Module Series Contents Safety Information ............................ 3 About the Document ..........................4 Contents ..............................5 Table Index ............................... 8 Figure Index ............................10 Introduction ............................. 12 1.1. Special Mark ........................... 12 Product Overview ..........................13 2.1. Frequency Bands and Functions .................... 13 2.2.
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5G Module Series 4.2. Forced Download Interface ....................52 4.3. (U)SIM Interfaces ........................53 4.4. UART Interfaces ........................56 4.5. PCM Interfaces* ........................58 4.5.1. PCM for SLIC or Codec ....................60 4.5.2. PCM for Bluetooth Audio ..................... 61 4.6. I2C Interfaces .........................
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5G Module Series 6.4. Digital I/O Characteristics ....................... 99 6.5. ESD Protection ........................100 6.6. Operating and Storage Temperatures .................. 101 6.7. Thermal Dissipation ......................101 Mechanical Information ........................ 103 7.1. Mechanical Dimensions ......................103 7.2. Recommended Footprint ...................... 105 7.3.
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5G Module Series Table Index Table 1: Special Mark ..........................12 Table 2: Basic Information ........................13 Table 3: Frequency Bands and Functions ....................13 Table 4: Key Features ..........................14 Table 5: Parameter Definition ........................21 Table 6: Pin Description ........................... 21 Table 7: Operating Modes Overview .......................
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5G Module Series Table 42: RF Transmitting Power ......................83 Table 43: Conducted RF Receiver Sensitivity of RG650E-NA/RG650V-NA (Unit: dBm) ......84 Table 44: Conducted RF Receiver Sensitivity of RG650E-EU*/RG650V-EU (Unit: dBm) ......86 Table 45: Pin Description of GNSS Antenna Interface ................88 Table 46: GNSS Frequency (Unit: MHz) ....................
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5G Module Series Figure Index Figure 1: Functional Diagram ........................19 Figure 2: Pin Assignment (Top View) ....................... 20 Figure 3: Module Power Consumption in Sleep Mode ................37 Figure 4: Block Diagram of Application with USB Remote Wakeup Function in Sleep Mode ....38 Figure 5: Block Diagram of Application with MAIN_RI Function in Sleep Mode ........
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Figure 50: Bottom Dimensions (Bottom View) ..................104 Figure 51: Recommended Footprint ...................... 105 Figure 52: Top & Bottom Views of RG650E Series ................106 Figure 53: Top & Bottom Views of RG650V Series ................106 Figure 54: Recommended Reflow Soldering Thermal Profile ..............108 Figure 55: Carrier Tape Dimension Drawing (Unit: mm) .................
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5G Module Series Introduction QuecOpen® is a solution where the module acts as the main processor. Constant transition and evolution of both the communication technology and the market highlight its merits. It can help you to: ⚫ Realize embedded applications’ quick development and shorten product R&D cycle ⚫...
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5G Module Series Product Overview The module is an SMD module with compact packaging. Table 2: Basic Information RG650E & RG650V Series Packaging type Pin counts Dimensions (46.0 ± 0.2) mm × (53.0 ± 0.2) mm × (3.05 ±0.2) mm Weight Approx.
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5G Module Series 2.2. Key Features Table 4: Key Features Feature Details ⚫ 3.3–4.4 V Supply Voltage ⚫ Typ.: 3.8 V ⚫ Text and PDU mode ⚫ Point-to-point MO and MT ⚫ SMS cell broadcast ⚫ SMS storage: ME by default ⚫...
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Use: network activity status indication ⚫ Complies with the AT commands defined in 3GPP TS 27.007 and AT Commands 3GPP TS 27.005 ⚫ Complies with Quectel enhanced AT commands Rx-diversity 5G NR, LTE and WCDMA Antenna Interfaces ⚫ Cellular antenna interfaces (ANT0–ANT7)
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5G Module Series ⚫ GNSS antenna interface (ANT_GNSS) ⚫ 50 Ω characteristic impedance ⚫ 5G NR bands for HPUE: Class 2 (26 dBm +2/-3 dB) – RG650E-NA/RG650V-NA: n2/n5/n7/n25/n38/n41/n66/n71/n77/n78 – RG650E-EU*/RG650V-EU: n1/n3/n5/n7/n28/n38/n40/n41/n77/n78 Transmitting Power ⚫ 5G NR n38/n41/n77/n78: Class 1.5 (29 dBm +2/-3 dB) ⚫...
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5G Module Series Internet Protocol ⚫ The module complies with NITZ, PING, QMI protocols Features ⚫ The module supports PAP and CHAP for PPP connections ⚫ Normal operating temperature : -30 ° C to +75 ° C Temperature Ranges ⚫ Extended operating temperature : -40 °...
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5G Module Series 2.3. Functional Diagram The functional diagram illustrates the following major functional parts: Power management ⚫ Baseband part ⚫ ⚫ DDR + EMMC flash ⚫ Radio frequency part ⚫ Peripheral interfaces RG650E&RG650V_Series_QuecOpen_Hardware_Design 19 / 125...
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3. Ensure that the pull-up power supply of the module's pins is VDD_EXT or controlled by VDD_EXT, and there is no current sink on the module's pins before the module turns on. For more details, contact Quectel Technical Support. 2.5. Pin Description...
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5G Module Series 154, 157, Power supply for the VBAT_RF2 158, 161 module’s RF part Power supply for external GPIO’s Provide 1.8 V for pull-up circuits. VDD_EXT Vnom = 1.8 V external circuit A test point is recommended to be reserved. Either 1.8 V or 3.0 V (U)SIM card is...
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5G Module Series Internally pulled Initiate power on CBL_PWR_N up to 1.8 V. when grounded Active low. A test point is Force the module USB_BOOT VDD_EXT recommended to into download mode be reserved. Airplane mode W_DISABLE# VDD_EXT control Indication Signals Pin Name Pin No.
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5G Module Series USB 3.1 90 Ω. USB_SS_TX_M SuperSpeed If unused, keep transmit (-) them open. USB 3.1 USB_SS_RX_P SuperSpeed receive USB 3.1 USB_SS_RX_M SuperSpeed receive High level by USB_ID* USB ID detect 1.2 V default. OTG_PWR_EN* OTG power control 1.8 V (U)SIM Interfaces Pin Name...
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5G Module Series Main UART ring MAIN_RI indication Main UART data MAIN_DTR terminal ready Main UART data MAIN_DCD carrier detect Bluetooth UART Interface* Pin Name Pin No. Description Comment Characteristics Bluetooth UART BT_TXD 1.8 V power transmit domain by Bluetooth UART default.
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5G Module Series Pin Name Pin No. Description Comment Characteristics PCM data frame In master mode, EXT_PCM_SYNC sync it is an output signal. In slave mode, it is an input EXT_PCM_CLK PCM clock signal. VDD_EXT Only used for SLIC and codec. EXT_PCM_DIN PCM data input Only used for...
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5G Module Series If unused, keep PCIE0_TX0_P PCIe0 transmit 0 (+) them open. PCIE0_RX1_M PCIe0 receive 1 (-) PCIE0_RX1_P PCIe0 receive 1 (+) PCIE0_TX1_M PCIe0 transmit 1 (-) PCIE0_TX1_P PCIe0 transmit 1 (+) 1.8 V power domain by default. PCIE0_RST_N PCIe0 reset In RC mode, it is an output signal.
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Wi-Fi n79 LNA to isolation 5 GHz. If n79 is mode needed in your future project Notification from with Quectel 5G transceiver to modules, then N79_TX_EN_TO_ WLAN when n79 these pins shall WLAN transmitting to set...
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5G Module Series platform. Signal interface used for WWAN/WLAN Coexistence COEX_RXD coexistence UART receive mechanism. 1.8 V power domain by default. Interface* Pin Name Pin No. Description Comment Characteristics LCD SPI master-in LCD_SPI_MISO slave-out LCD_SPI_CS LCD SPI chip select Master mode VDD_EXT only.
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5G Module Series 2.2 kΩ resistor. If unused, keep them open. ETH Control Interfaces Pin Name Pin No. Description Comment Characteristics Ethernet PHY0 ETH0_MDIO MDIO data Ethernet PHY0 ETH0_MDC MDIO clock Ethernet PHY0 ETH0_INT_N interrupt Ethernet PHY0 ETH0_RST_N reset Ethernet PHY0 ETH0_PWR_EN power supply enable control...
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5G Module Series HORxD4 GNSS antenna interface: ANT_GNSS L1/L2/L5 Antenna Tuner Control Interfaces* Pin Name Pin No. Description Comment Characteristics GRFC interfaces SDR_GRFC11 dedicated for If unused, keep 1.8 V external antenna them open. SDR_GRFC12 tuner control Pin Name Pin No. Description Comment Characteristics...
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5G Module Series 2.6. EVB Kit Quectel supplies an evaluation board (5G-SOC-EVB) with accessories to develop and test the module. For more details, see document [1]. RG650E&RG650V_Series_QuecOpen_Hardware_Design 35 / 125...
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5G Module Series Operating Characteristics 3.1. Operating Modes Table 7: Operating Modes Overview Mode Description The module remains registered on the network but has no Idle Full Functionality data interaction with the network. Software is active. Mode The module is connected to the network. Power consumption Voice/Data is decided by network settings and data rate.
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5G Module Series 3.2. Sleep Mode With DRX technology, power consumption of the module will be reduced to an ultra-low level. The figure below shows the relationship between the DRX run time and the current consumption in sleep mode. The longer the DRX runs, the lower the current consumption is. DRX OFF ON Run time Figure 3: Module Power Consumption in Sleep Mode...
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5G Module Series 3.2.1.1. USB Application with USB Suspend/Resume and USB Remote Wakeup Function The host supports USB Suspend/Resume and remote wakeup functions. USB_VBUS USB_DP USB_DP USB_DM USB_DM Host Module Figure 4: Block Diagram of Application with USB Remote Wakeup Function in Sleep Mode ⚫...
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5G Module Series ⚫ When the module has a URC to report, the module will wake up the host through MAIN_RI signal. 3.2.1.3. USB Application without USB Suspend Function If the host does not support USB Suspend function, the following four preconditions must be met to make the module enter the sleep mode: ⚫...
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5G Module Series 3.3.1. Hardware The W_DISABLE# pin is pulled up by default. Driving it low will set the module enter airplane mode. See Chapter 4.15.1 for details. 3.3.2. Software AT+CFUN=<fun> provides choices of the functionality level through setting <fun> to 0, 1 or 4. ⚫...
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5G Module Series 3.4.3. Requirements for Voltage Stability The power supply range of the module is from 3.3 V to 4.4 V. Ensure the input voltage never drops below 3.3 V. Burst Burst Transmission Transmission Load (A) Power Supply (V) Ripple Drop Figure 8: Power Supply Limits During Burst Transmission...
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5G Module Series 3.5. Turn On 3.5.1. Turn On with PWRKEY Table 9: Pin Description of PWRKEY Pin Name Pin No. Description Comment PWRKEY Turn on/off the module Active low. When the module is in turn-off state, it can be turned on by driving PWRKEY low for at least 500 ms. It is recommended to use an open drain/collector driver to control PWRKEY.
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5G Module Series N O TE V B AT 500 m s P W R K E Y R ES E T_N TB D S TA TU S TB D I nact i ve A ct i ve U AR T TB D A ct i ve U SB...
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5G Module Series 3.6. Turn Off 3.6.1. Turn Off with PWRKEY Drive PWRKEY low for at least 800 ms, and then release it. After this, the module executes turn-off procedure. VBAT 800 ms PWRKEY STATUS Module Power-down procedure Running Status Figure 13: Timing of Turn-off with PWRKEY 3.6.2.
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5G Module Series 3.7. RESET_N Drive RESET_N low for at least 500 ms and then releasing it to reset the module. RESET_N signal is sensitive to interference, consequently it is recommended to route the trace as short as possible and surround it with ground.
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5G Module Series V B AT R ES E T_N M odul e R unni ng R eset t i ng R est art S t at us Figure 16: Timing of Reset NOTE 1. Use RESET_N only when failing to turn off the module with AT+QPOWD and PWRKEY. 2.
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5G Module Series Application Interfaces 4.1. USB Interface The module provides one integrated Universal Serial Bus (USB) interface which complies with the USB 3.1/2.0 specifications and supports SuperSpeed (10 Gbps) on USB 3.1 Gen 2 and 5 Gbps on USB 3.1 Gen 1, high-speed (480 Mbps) and full-speed (12 Mbps) modes on USB 2.0. The USB interface can be used for AT command communication, data transmission, GNSS NMEA sentence output, software debugging, firmware upgrade and voice over USB*.
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5G Module Series Test points must be reserved for software debugging and firmware upgrading in your design. The following figure shows a reference circuit of USB 2.0 interface. Test Points Minimize these stubs NM_0R NM_0R USB_VBUS TVS Array USB_DM USB_DM USB_DP USB_DP Close to Module...
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5G Module Series the recommended value is 5.0 V. The module supports charging management of a single Li-ion battery. Different charging parameters need to be set for batteries with different capacities. Meanwhile, the module also supports USB OTG mode. When USB_ID is held at high level by default, the module acts as USB slave device.
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5G Module Series NOTE Both USB 3.1 interface and PCIe interface support data transmission, and USB 3.1 interface is used default. want PCIe interface communication, with AT+QCFG="data_interface" via USB 2.0. 4.2. Forced Download Interface The module provides a USB_BOOT interface for forced download. Pulling up USB_BOOT to VDD_EXT before turning on the module, and then the module will enter forced download mode.
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5G Module Series 4.3. (U)SIM Interfaces The (U)SIM interfaces meet ETSI and IMT-2000 requirements. Either 1.8 V or 3.0 V (U)SIM card is supported on (U)SIM1 interface, and only 1.8 V eSIM is supported on (U)SIM2 interface. Dual SIM Single Standby function is supported. Table 15: Pin Description of (U)SIM Interfaces Pin Name Pin No.
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5G Module Series VDD_EXT 100K (U)SIM Card Connector USIM1_VDD USIM1_RST USIM1_CLK USIM1_DET USIM1_DATA Module 10 pF 10 pF 10 pF TVS Array Figure 20: Reference Design of (U)SIM1 Interface with an 8-pin (U)SIM Card Connector If the function of (U)SIM card hot-plug is not needed, keep USIM_DET disconnected. A reference circuit for (U)SIM1 interface with a 6-pin (U)SIM card connector is illustrated in the following figure.
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5G Module Series 1 μF 100 nF eSIM USIM2_VDD USIM2_RST USIM2_CLK USIM2_DATA Module Figure 22: Reference Design of (U)SIM2 Interface with eSIM To enhance the reliability and availability of the (U)SIM card and eSIM in applications, you should follow the principles below in the (U)SIM circuit design: ⚫...
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5G Module Series 4.4. UART Interfaces The module provides three UART interfaces: main UART interface*, debug UART interface, and Bluetooth UART interface*. The following shows their features. Table 16: UART Information UART Type Default Baud Rate Function Main UART interface 115200 bps Data transmission Debug UART interface...
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5G Module Series default. Connect to the MCU's Clear to send signal from CTS. BT_CTS the module 1.8 V power domain by default. DBG_RXD Debug UART receive Test points must be reserved. DBG_TXD Debug UART transmit The module provides 1.8 V UART interface. You can use a voltage-level translator between the module and MCU’s UART interface if the MCU is equipped with a 3.3 V UART interface.
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5G Module Series 4.7K VDD_1V8 VDD_1V8 1 nF MAIN_RXD MAIN_TXD 1 nF VDD_1V8 VDD_MCU 4.7K GPIO MAIN_DTR EINT MAIN_RI GPIO MAIN_DCD Module Figure 24: Reference Design Transistor Circuit (Main UART) NOTE 1. Transistor circuit above is not suitable for applications with baud rates exceeding 460 kbps. 2.
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5G Module Series 125 μs PCM_CLK PCM_SYNC PCM_DOUT PCM_DIN Figure 25: Timing of Short Frame Mode In short frame mode, data is sampled on the falling edge of PCM_CLK and transmitted on the rising edge. The PCM_SYNC falling edge represents the MSB. In this mode, PCM_CLK supports 256 kHz, 512 kHz, 1024 kHz and 2048 kHz when PCM_SYNC operates at 8 kHz, and also supports 4096 kHz when PCM_SYNC operates at 16 kHz.
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5G Module Series The clock and mode of PCM can be configured by AT+QDAI, and the default configuration is short frame mode (PCM_CLK = 2048 kHz, PCM_SYNC = 8 kHz). 4.5.1. PCM for SLIC or Codec The module provides one PCM interface for SLIC or codec. Pin definition is listed as follows. Table 18: Pin Description of PCM Interface for SLIC or Codec Pin Name Pin No.
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5G Module Series 4.5.2. PCM for Bluetooth Audio The module provides one PCM interface only used for Bluetooth audio. Pin definition is listed as follows: Table 19: Pin Definition of PCM Interface for Bluetooth Audio Pin Name Pin No. Description Comment Bluetooth PCM data frame BT_PCM_SYNC...
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5G Module Series Table 20: Pin Description of General I2C Interface Pin Name Pin No. Description Comment Pull each of them up to MAIN_I2C_SCL I2C serial clock VDD_EXT with an external 2.2 kΩ resistor. If unused, keep them MAIN_I2C_SDA I2C serial data open.
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5G Module Series NOTE 1. The input voltage of each ADC interface should not exceed its corresponding voltage range. 2. It is prohibited to directly supply any voltage to ADC interface when the module is not powered by VBAT. 3. It is recommended to use resistor divider circuit for ADC interface application. Resistance of the external resistor divider should not exceed 1 MΩ, or the measurement accuracy of ADC would be significantly reduced.
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5G Module Series Ethernet PHY0 ETH0_INT_N interrupt ETH0_RST_N Ethernet PHY0 reset Ethernet PHY0 power ETH0_PWR_EN supply enable control Ethernet PHY1 MDIO ETH1_MDIO data Ethernet PH1 MDIO ETH1_MDC clock Ethernet PHY1 ETH1_INT_N interrupt ETH1_RST_N Ethernet PHY1 reset Ethernet PHY1 power ETH1_PWR_EN supply enable control VDD_1V8 1.5K...
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5G Module Series sensitive/high-speed signals and circuits must be routed far away from USXGMII traces. ⚫ The differential impedance of USXGMII data traces is 100 Ω ±10 %. ⚫ For each differential pair, intra-lane length match should be less than 0.7 mm. The total bus length should be less than 144 mm.
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5G Module Series 4.9. LCM Interface* The module provides one LCM interface, which supports LCD module with maximum resolution of 240 × 320. It also supports 4-lane SPI communication. The pin definition of the LCM interface is shown below. Table 25: Pin Description of LCM Interface Pin Name Pin No.
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5G Module Series VDD_2V8 LCD_PWR_EN VDD_2V8 VDD_3V3 LEDA Backlight LEDK LCD_SPI_CLK LCM_CLK LCD_SPI_CS LCM_CS LCM_MOSI LCD_SPI_MOSI LCD_SPI_MISO LCM_MISO LCD_RST LCM_RST LCD_RS LCM_RS Module Figure 30: Reference Design of LCM Interface 4.10. Touch Panel Interface* The module provides an I2C interface for connection with touch panel (TP) by default. Also, corresponding power supply pins, reset pins and interrupt pins are provided.
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5G Module Series TP_RST TP reset VDD_EXT VDD_3V3 LCD_PWR_EN VDD_3V3 2.2K 2.2K TP_I2C_SCL TP_SCL TP_I2C_SDA TP_SDA TP_INT TP_INT TP_RST TP_RST Module Figure 31: Reference Design of Touch Panel Interface 4.11. PCIe Interfaces The module provides three PCIe interfaces. Key features of the PCIe interfaces are as below: ⚫...
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5G Module Series PCIE1_WAKE_N PCIe1 wake up In RC mode, it is an input signal. PCIE1_CLKREQ_N 61 PCIe1 clock request PCIE2_REFCLK_M PCIe2 reference clock (-) Require differential impedance of 100 Ω. PCIE2_REFCLK_P PCIe2 reference clock (+) PCIE2_RX0_M PCIe2 receive 0 (-) Require differential PCIE2_RX0_P PCIe2 receive 0 (+)
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5G Module Series C4 near the PCIe device. Keep the traces as short as possible. To ensure that the PCIe interface design meets PCIe specifications, you should follow the principles below: Route PCIe signal traces (Tx/Rx/REFCLK) as differential pairs with surrounded ground. The ⚫...
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5G Module Series PCIE0_TX1_M PCIE0_TX1_P PCIE1_REFCLK_M PCIE1_REFCLK_P PCIE1_RX0_M PCIE1_RX0_P PCIE1_TX0_M PCIE1_TX0_P PCIE1_RX1_M PCIE1_RX1_P PCIE1_TX1_M PCIE1_TX1_P PCIE2_REFCLK_M PCIE2_REFCLK_P PCIE2_RX0_M PCIE2_RX0_P PCIE2_TX0_M PCIE2_TX0_P NOTE PCIe interfaces do not support hot-plug function. RG650E&RG650V_Series_QuecOpen_Hardware_Design 72 / 125...
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5G Module Series 4.12. SPIs The module provides two SPIs: one is used for general SPI, and the other is used for LCM SPI. Both only support master mode with a maximum clock frequency up to 50 MHz. The below table gives the pin description of general SPI. For the other used for LCM SPI, see Chapter 4.9 for details.
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5G Module Series t(ch) SPI clock high-level period t(cl) SPI clock low-level period t(mov) Valid period of SPI master data output t(mis) Setup period of SPI master data input t(mih) Holding period of SPI master data input The module provides a 1.8 V SPI. Use a voltage-level translator between the module and MCU if MCU is 3.3 V power domain.
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_N79 set n79 LNA to isolation mode and Wi-Fi 5 GHz. If n79 is needed in your future project with Quectel 5G Notification from transceiver to modules, then these N79_TX_EN_TO_ WLAN when n79 transmitting to pins shall be pulled out...
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5G Module Series GPIO allows transceiver to power on monitoring for Wi-Fi SoC when WLAN is sleeping or WLAN_LAA_AS_ disabled. Additionally, the control logic in WLAN AON domain allows transceiver to control 5G WLAN xLNA (LNA in FEMs) SoC signal to set 5G xLNA to high gains or high isolation when both chains (LAA and 5G WLAN_LAA_RX...
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5G Module Series AT+CFUN=4 Disabled Airplane mode AT+CFUN=0 AT+CFUN=1 Disabled Airplane mode AT+CFUN=4 NOTE The execution of AT+CFUN does not affect GNSS function. 4.16. Indication Signals Pin definition of indication signals is listed as follows: Table 35: Pin Description of Indication Signals Pin Name Pin No.
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5G Module Series Blink slowly (1800 ms high/200 ms low) Idle Blink quickly (125 ms high/125 ms low) Data transmission is ongoing Always high Voice calling Always low Minimum functionality mode VBAT 2.2K 4.7K NET_MODE/ NET_STATUS Module Figure 35: Reference Design of Network Status Indication 4.16.2.
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5G Module Series 4.17. MAIN_RI* AT+QCFG="risignaltype","physical" can be used to configure MAIN_RI behavior. No matter on which port (USB AT port or USB modem port) a URC is presented, the URC will trigger MAIN_RI behavior. NOTE AT+QURCCFG can be used to set the USB AT port or USB modem port as URC output port. The USB AT port is the URC output port by default.
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5G Module Series RF Specifications Appropriate antenna type and design with matched antenna parameters should be used depending on application scenario. Comprehensive functional testing of RF design is required before mass production of terminal products. This chapter is provided for illustrative purposes only. Analysis and evaluation are necessary when designing target products.
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5G Module Series Table 41: Truth Table of Antenna Tuner Control Interfaces Frequency Range SDR_GRFC11 Level SDR_GRFC12 Level Band (Unit: MHz) High High High High 5.1.3. Transmitting Power Table 42: RF Transmitting Power Mode Frequency Band Max. Min. WCDMA WCDMA bands 23 dBm ±...
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5G Module Series 5G NR FDD n20 -95.2 -95.4 -98.2 -89.8 (20 MHz) 5G NR FDD n26 -95.5 -95.8 -98.5 -87.6 (20 MHz) 5G NR FDD n28 -93.0 -93.3 -96.5 -78.5 (30 MHz) 5G NR TDD n38 -90.5 -97.0 -93.4 (40 MHz) 5G NR TDD n40 -84.5...
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5G Module Series Keep at least 15 dB isolation between cellular antennas to improve the receiver sensitivity, and at least 20 dB isolation between 5G NR UL MIMO antennas. The isolation between each antenna trace on PCB is recommended to be more than 75 dB. Keep digital circuits such as switch mode power supply, (U)SIM card, USB interface, camera module, display connector and SD card away from the antenna traces.
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5G Module Series 5.2.3. Reference Design GNSS Antenna 100 pF ANT_GNSS Module Figure 38: Reference Design of GNSS Antenna NOTE It is not recommended to add an external LNA when using a passive GNSS antenna. Keep the characteristic impedance for ANT_GNSS trace as 50 Ω when routing. Place the π-type matching components as close to the antenna as possible.
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5G Module Series Figure 39: Microstrip Design on a 2-layer PCB Figure 40: Coplanar Waveguide Design on a 2-layer PCB Figure 41: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 42: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) RG650E&RG650V_Series_QuecOpen_Hardware_Design 91 / 125...
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5G Module Series To ensure RF performance and reliability, follow the principles below in RF layout design: ⚫ Use an impedance simulation tool to accurately control the characteristic impedance of RF traces to 50 Ω. ⚫ The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully connected to ground.
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5G Module Series 5.5. RF Connector Recommendation The receptacle dimensions are illustrated as below. Figure 43: Dimensions of the Receptacles (Unit: mm) The following figure shows the dimensions of mated plugs using Ø0.81 mm coaxial cables. RG650E&RG650V_Series_QuecOpen_Hardware_Design 93 / 125...
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5G Module Series Figure 44: Dimensions of Mated Plugs Using Ø0.81 mm Coaxial Cables 5.5.1. Recommended RF Connector for Installation 5.5.1.1. Assemble Coaxial Cable Plug Manually The illustration for plugging in a coaxial cable plug is shown below, θ = 90° is acceptable, while θ ≠ 90° is not.
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5G Module Series Figure 46: Pull out a Coaxial Cable Plug 5.5.1.2. Assemble Coaxial Cable Plug with Jig The pictures of installing the coaxial cable plug with a jig is shown below, θ = 90° is acceptable, while θ ≠ 90° is not. Figure 47: Install the Coaxial Cable Plug with Jig 5.5.2.
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5G Module Series Electrical Characteristics and Reliability 6.1. Absolute Maximum Ratings Table 49: Absolute Maximum Ratings Parameter Min. Max. Unit Voltage at VBAT_RF/VBAT_BB -0.5 Voltage at USB_VBUS Voltage at digital pins Voltage at ADC0 Voltage at ADC1 -0.5 Peak Current at VBAT_BB Peak Current at VBAT_RF1/VBAT_RF2 6.2.
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5G Module Series 6.3. Power Consumption Table 51: RG650E-NA/RG650V-NA Power Consumption Mode Condition Band/Combination Typ. Unit Turn off Turn off μA AT+CFUN=0 (USB 3.0 Suspend) AT+CFUN=4 (USB 3.0 Suspend) Sleep mode SA FDD PF = 64 (USB 3.0 Suspend) SA TDD PF = 64 (USB 3.0 Suspend) SA PF = 64 (USB 2.0 active)
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5G Module Series Tx power @ 26 dBm LTE DL, 256QAM LTE UL, QPSK NR DL, 256QAM LTE + 5G FR1 DC_2A_n78A EN-DC NR UL, QPSK LTE Tx Power @ 23 dBm NR Tx Power @ 23 dBm Table 52: RG650E-EU*/RG650V-EU Power Consumption Mode Condition Band/Combination...
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5G Module Series (1 Tx) 5G NR, MB @ 23 dBm 5G NR HB @ 23 dBm 5G NR UHB @ 26 dBm 5G SA FR1 5G NR UL 2 × 2 MIMO @ (2 Tx) 26 dBm DL 2CA, 256QAM 5G SA FR1 CA UL 1CA, 256QAM n78C...
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5G Module Series Table 54: 1.8 V I/O Characteristics (Unit: V) Parameter Description Min. Max. High-level input voltage 1.26 2.10 Low-level input voltage -0.30 0.54 High-level output voltage 1.35 1.80 Low-level output voltage 0.45 Table 55: (U)SIM High-voltage I/O Characteristics (Unit: V) Parameter Description Min.
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5G Module Series Table 57: ESD Characteristics (Temperature: 25–30 ° C, Humidity: 40 ± 5 %; Unit: kV) Test Point Contact Discharge Air Discharge VBAT, GND ± 5 ± 10 All antenna interfaces ± 4 ± 8 Other interfaces ± 0.5 ±...
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5G Module Series ⚫ Maintain the integrity of the PCB copper layer and drill as many thermal vias as possible. ⚫ Follow the principles below when the heatsink is necessary: Do not place large size components in the area where the module is mounted on your PCB to reserve enough place for heatsink installation.
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5G Module Series Mechanical Information This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ±0.2 mm unless otherwise specified. 7.1. Mechanical Dimensions Figure 49: Top and Side Dimensions RG650E&RG650V_Series_QuecOpen_Hardware_Design 103 / 125...
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5G Module Series Figure 50: Bottom Dimensions (Bottom View) ⚫ NOTE The package warpage level of the module refers to the JEITA ED-7306 standard. RG650E&RG650V_Series_QuecOpen_Hardware_Design 104 / 125...
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5G Module Series 7.2. Recommended Footprint Figure 51: Recommended Footprint NOTE Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience. To keep the reliability of the mounting and soldering, keep the motherboard thickness as at least 1.2 mm.
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Figure 53: Top & Bottom Views of RG650V Series NOTE Images above are for illustration purpose only and may differ from the actual module. For authentic appearance and label, please refer to the module received from Quectel. RG650E&RG650V_Series_QuecOpen_Hardware_Design 106 / 125...
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5G Module Series Storage, Manufacturing and Packaging 8.1. Storage Conditions The module is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: the temperature should be 23 ± 5 ° C and the relative humidity should be 35–60 %.
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5G Module Series NOTE 1. To avoid blistering, layer separation and other soldering issues, extended exposure of the module to the air is forbidden. 2. Take out the module from the package and put it on high-temperature-resistant fixtures before baking. If shorter baking time is desired, see IPC/JEDEC J-STD-033 for the baking procedure. 3.
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RoHS compliant and their mercury content is below 1000 ppm (0.1 %). 5. Due to the complexity of the SMT process, contact Quectel Technical Support in advance for any situation that you are not sure about, or any process (e.g. selective wave soldering, ultrasonic soldering) that is not mentioned in document [6].
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5G Module Series 8.3.1. Carrier Tape Carrier tape dimensions are illustrated in the following figure and table: Figure 55: Carrier Tape Dimension Drawing (Unit: mm) Table 61: Carrier Tape Dimension Table (Unit: mm) 72.5 72.5 72.5 8.3.2. Plastic Reel Plastic reel dimensions are illustrated in the following figure and table: Figure 56: Plastic Reel Dimension Drawing RG650E&RG650V_Series_QuecOpen_Hardware_Design 110 / 125...
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5G Module Series Table 62: Plastic Reel Dimension Table (Unit: mm) øD1 øD2 72.5 8.3.3. Mounting Direction Figure 57: Mounting Direction RG650E&RG650V_Series_QuecOpen_Hardware_Design 111 / 125...
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5G Module Series 8.3.4. Packaging Process Place the modules onto the carrier tape cavity and cover them securely with cover tape. Wind the heat-sealed carrier tape onto a plastic reel and apply a protective tape for additional protection. 1 plastic reel can pack 100 modules.
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5G Module Series Appendix A References Table 63: Related Documents Document Name [1] Quectel_5G_SOC_EVB_User_Guide [2] Quectel_RG650E&RG650V_Series_AT_Commands_Manual [3] Quectel_RG650E&RG650V_Series_QuecOpen(SDK)_Low_Power_Mode_Development_Guide [4] Quectel_RG650E&RG650V_Series_GNSS_Application_Note [5] Quectel_RF_Layout_Application_Note [6] Quectel_Module_SMT_Application_Note Table 64: Terms and Abbreviations Abbreviation Description Analog-to-Digital Converter AMR-WB Adaptive Multi-Rate Wideband Active Optical Network Appliation Processor Baseband BeiDou Navigation Satellite System...
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5G Module Series CMUX Connection Multiplexing Coding Scheme Clear To Send Data Communications Equipment DC-HSDPA Dual-carrier High Speed Downlink Packet Access Double Data Rate Downlink Discontinuous Reception Diversity Receive Data Terminal Equipment Data Terminal Ready Enhanced Full Rate Electromagnetic Interference Extended Profile Electrostatic Discharge Equivalent Series Resistance...
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5G Module Series GLONASS Global Navigation Satellite System (Russia) GMSK Gaussian Minimum Shift Keying GNSS Global Navigation Satellite System Global Positioning System GRFC General RF Control Global System for Mobile Communications High Band HORxD High Order Rx Diversity HPUE High Power User Equipment Half Rate HSDPA High Speed Downlink Packet Access...
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5G Module Series Land Grid Array LMHB Low/Middle/High Band Low Noise Amplifier Long Term Evolution Machine to Machine Media Access Control Middle Band Microcontroller Unit Management Data Clock MDIO Management Data Input/Output Middle/High Band MLCC Multi-layer Ceramic Capacitor MIMO Multiple Input Multiple Output Multimedia Messaging Service Mobile Originated MQTT...
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5G Module Series Power Amplifier Password Authentication Protocol Personal Computer Printed Circuit Board PCIe Peripheral Component Interconnect Express Pulse Code Modulation Personal Digital Assistant Protocol Data Unit Physical Layer PING Packet Internet Groper Power Management Unit PMIC Power Management Integrated Circuit Point-to-Point Protocol Primary Receive Quadrature Amplitude Modulation...
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5G Module Series Sub-Carrier Space Secure Digital SIMO Single Input Multiple Output Surface Mount Device Short Message Service Surface Mount Technology SMTP Simple Mail Transfer Protocol SMTPS Simple Mail Transfer Protocol Secure System on Chip Serial Peripheral Interface Sounding Reference Signal Secure Sockets Layer Set Top Box Transmission Control Protocol...
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5G Module Series (U)SIM Universal Subscriber Identity Module VBAT Voltage at Battery (Pin) Vmax Maximum Voltage Vnom Nominal Voltage Vmin Minimum Voltage VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network WWAN Wireless Wide Area Network XTRA eXTended Receiver Assistance RG650E&RG650V_Series_QuecOpen_Hardware_Design...
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5G Module Series Appendix B Operating Frequency Table 65: Operating Frequencies (5G) Duplex Mode Uplink Operating Band Downlink Operating Band Unit 1920–1980 2110–2170 1850–1910 1930–1990 1710–1785 1805–1880 824–849 869–894 2500–2570 2620–2690 880–915 925–960 699–716 729–746 777–787 746–756 788–798 758–768 815–830 860–875 832–862 791–821...
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5G Module Series 450–455 460–465 1427–1470 1475–1518 1432–1517 1427–1432 698–716 728–746 410–415 420–425 412–417 422–427 11.1 FCC 11.1.1. Important Notice to OEM integrators 1. This module is limited to OEM installation ONLY. 2. This module is limited to installation in mobile or fixed applications, according to Part 2.1091(b). 3.
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5G Module Series (1)The antenna must be installed such that 20 cm is maintained between the antenna and users, (2)The transmitter module may not be co-located with any other transmitter or antenna. (3)Only antennas of the same type and with equal or less gains as shown below may be used with this module.
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5G Module Series NR N71 8.48 NR N71 MIMO 5.48 NR N77(3450-3550) 2.00 NR N77(3450-3550) MIMO 0.00 NR N77(3700-3980) 2.00 NR N77(3700-3980) MIMO 0.00 NR N78(3450-3550) 2.00 NR N78(3450-3550) MIMO 0.00 NR N78(3700-3800) 2.00 NR N78(3700-3800) MIMO 0.00 In the event that these conditions cannot be met (for example certain laptop configurations or co-location with another transmitter), then the FCC/IC authorization is no longer considered valid and the FCC ID/IC ID cannot be used on the final product.
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5G Module Series The modular transmitter is only FCC authorized for the specific rule parts (i.e., FCC transmitter rules) listed on the grant, and that the host product manufacturer is responsible for compliance to any other FCC rules that apply to the host not covered by the modular transmitter grant of certification. If the grantee markets their product as being Part 15 Subpart B compliant (when it also contains unintentional- radiator digital circuity), then the grantee shall provide a notice stating that the final host product still requires Part 15 Subpart B compliance testing with the modular transmitter installed.
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5G Module Series 11.2.4. This device is intended only for OEM integrators under the following conditions: (For module device use) The antenna must be installed such that 20 cm is maintained between the antenna and users, and The transmitter module may not be co-located with any other transmitter or antenna. As long as 2 conditions above are met, further transmitter test will not be required.
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5G Module Series or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual shall include all required regulatory information/warning as show in this manual. 11.2.11.Manuel d'information à l'utilisateur final L'intégrateur OEM doit être conscient de ne pas fournir des informations à...
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