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EVM User's Guide: TMDS62LEVM
AM62L Evaluation Module
Description
The TMDS62LEVM evaluation module (EVM) is
designed for low-cost & performance optimized
AM62L family of application processors. The AM62L
has scalable Arm
®
Cortex
and embedded features such as: Multimedia DSI
support, integrated ADC on chip, advanced lower
power management modes, and extensive security
options for IP protection and secure boot. The AM62L
family of devices supports development with Linux
and FreeRTOS
™
.
The TMDS62LEVM includes an extensive set of
peripherals that make it a well-suited general-purpose
device for a broad range of industrial applications
while offering intelligent features and optimized power
architecture as well. In addition, the extensive set of
peripherals included in the AM62L enables system-
level connectivity, such as: USB, MMC/SD, OSPI,
CAN-FD and an ADC and other interfaces to facilitate
easy prototyping. Additionally, it features two on-board
temperature sensors for monitoring SoC and LPDDR4
thermal conditions.
Get Started
1. Order the EVM at
TMDS62LEVM
2. Download the EVM
Design
3. Download the software from
4. Read this EVM User's Guide.
SPRUJG8 – FEBRUARY 2025
Submit Document Feedback
®
-A53 core performance
®
Files.
TMDS62LEVM
TMDS62LEVM Hardware Board
Copyright © 2025 Texas Instruments Incorporated
Features
•
2x Gigabit Ethernet RJ45 connectors
•
2GB LPDDR4 memory
•
512Mb OSPI Flash memory
•
1GB QSPI Flash memory
•
32GB eMMC Flash memory
•
MicroSD card slot
•
1x USB 2.0 Type-C
®
•
1x USB 2.0 Type-A
•
3x MCAN headers
•
1x 3.5mm TRRS Audio Jack
•
M.2 connector for Wi-Fi/BT module
•
HDMI
™
connector for external display
•
2x GPIO Expansion connector
•
ADC Header
•
DSI Display Connector
Applications
•
Building automation: smart home devices, HVAC
controller, IoT devices
•
Energy infrastructure: EV charging and supply
equipment, smart meter
•
Industrial automation: factory automation,
robotics, industrial HMI
•
Medical: medical devices, patient monitoring
systems
Description
AM62L Evaluation Module
1
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Related Manuals for Texas Instruments AM62L
Summary of Contents for Texas Instruments AM62L
-
Page 1: Description
• MicroSD card slot power management modes, and extensive security • 1x USB 2.0 Type-C ® options for IP protection and secure boot. The AM62L • 1x USB 2.0 Type-A family of devices supports development with Linux ® • 3x MCAN headers and FreeRTOS ™... -
Page 2: Table Of Contents
5.2 Trademarks..................................6 Related Documentation................................56 List of Figures Figure 1-1. Functional Block Diagram of the AM62L EVM ......................Figure 2-1. AM62L EVM Top Side............................... Figure 2-2. AM62L EVM Bottom Side............................7 Figure 2-3. Example Bootmode switch (Full Pincount - SD Card Boot).................. - Page 3 Table 2-18. CPSW Ethernet PHY2 Default Configuration......................Table 2-19. I/O Expander Signal Details............................38 Table 2-20. Mapping of AM62D Low Power SoC with AM62L Low Power SK EVM peripherals ..........Table 2-21. SoC Power Supply..............................44 Table 2-22. INA I2C Device Address............................
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Page 4: Evaluation Module Overview
AM62L EVM can communicate with other processors or systems, and act as a communication gateway. In addition, the AM62L EVM can directly operate as a standard remote I/O system or simple sensor connected to an industrial communication network. The embedded emulation logic allows for emulation and debugging using standard development tools such as Code Composer Studio ™... -
Page 5: Device Information
Figure 1-1. Functional Block Diagram of the AM62L EVM 1.4 Device Information The AM62L EVM supports Linux and FreeRTOS development with a feature-rich software development kit (SDK). On-chip emulation logic allows for emulation and debugging using standard development tools such as ™... -
Page 6: Hardware
Hardware www.ti.com 2 Hardware 2.1 Additional Images Figure 2-1 Figure 2-2 show the AM62L EVM top-side and bottom-side images and the location of various blocks on the board. GPIO Expansion Header M.2 Interface MCAN2 Header CPSW Gigabit Ethernet 2 FTDI Micro-USB... -
Page 7: Key Features
Figure 2-2. AM62L EVM Bottom Side 2.2 Key Features The AM62L EVM is a high performance, standalone development platform that enables users to evaluate and develop industrial applications for the AM62L System-on-Chip (SoC) from Texas Instruments. The following sections discuss the key features of the AM62L EVM: 2.2.1 Processor... -
Page 8: Power Requirements
The PD controller is configured to detect an external power supply source and if the source can supply greater than 15W at 5V. If the external power supply can source below or equal to 15W@5V, then the AM62L EVM enters the powered off state. The AM62L EVM is powered on when the external supply can source greater than 15W@5V. -
Page 9: Setup And Configuration
Buffer ICs to cater for alternate pin functionality. The output of the buffer is connected to the bootmode pins on the AM62L SoC and the output is enabled only when the bootmode is needed during a reset cycle. -
Page 10: Table 2-3. Full Vs Reduced Bootmode Pin
Reserved No boot/Dev Boot None 25MHz USB0 UART 25MHz eMMC USB DFU 25MHz QSPI UART 25MHz MMC/SD card UART 25MHz eMMC MMC1/SD card 25MHz AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 11: Table 2-5. Bootmode Pin Mapping (Full Pincount)
Serial NAND OSPI QSPI UART MMCSD Boot (SD Card Boot or eMMC Boot using UDA) eMMC Boot GPMC NAND Fast-xSPI xSPI No boot/Dev Boot SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 12: Figure 2-4. Bootmode Switch Configuration For Mmcsd/Uart
2.4.2.4 Bootmode DIP Switch Configurations (Full Pincount) 2.4.2.4.1 Primary: SD Card, Backup: UART_0x0E43 Figure 2-4. Bootmode switch Configuration for MMCSD/UART backup 2.4.2.4.2 Primary: xSPI SFPD 1, Backup: UART_0x0E73 AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 13: Figure 2-5. Bootmode Switch Configuration For Xspi/Uart Backup
Figure 2-7. Bootmode switch Configuration for GPMC NAND/USB backup 2.4.2.4.5 Primary: GPMC NAND Original Timing, Backup: UART_0x0CDB Figure 2-8. Bootmode switch Configuration for GPMC NAND/UART backup 2.4.2.4.6 Primary: eMMC, Backup: SD_card_0x344B SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 14: Power On/Off Procedures
Figure 2-9. Bootmode switch Configuration for eMMC/MMCSD backup 2.4.3 User Test LEDs The AM62L EVM board contains two LEDs for user defined functions. Table 2-10 indicates the User Test LEDs and the associated GPIOs used to control it. Table 2-10. User Test LEDs... -
Page 15: Figure 2-11. Rtc Supply Selection Header
5x2 Female gang jumper as shown in Figure 2-11. Note Refer to the AM62L Power Implementation application note (AM62L Power Supply Implementation) for more information on the connections required to support low power mode. Figure 2-11. RTC Supply Selection Header... -
Page 16: Table 2-12. Power Test Points
VMAIN TP112 VCC_5V0 TP117 VCC3V3_XDS TP66 XDS_USB_VBUS TP56 VCC3V3_TA TP201 VBUS_5V0_TYPEA TP91 VBUS_TYPEC1 TP111 VBUS_TYPEC2 TP120 FT4232_USB_VBUS TP37 LDO_3V3 U61.8 VCC_3V3_FT4232 C20.2 VDD_MMC1_SD TP174 AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 17: Interfaces
2199119-4 2.6.2 DSI Interface The DSI Display interface of the AM62L SoC is connected to a 22-pin display connector (J23) manufacturer part 5019512230 from Molex. The AM62L EVM supports 4 DSI-TX lanes for high-speed video link and low power command link with resolutions up to 1920x1080p @ 60fps. Apart from these 4 lanes, the 22-pin connector is provided with a 3.3V supply with sourcing capability till 500mA, I2C0 for any pre initializations and two GPIO’s for... -
Page 18: Figure 2-12. Dsi Interface Block Diagram
Pin No. Signal VCC_3V3_SYS SOC_I2C0_SDA SOC_I2C0_SCL DGND DSI_GPIO1 DSI_GPIO0 DGND DSI_TX3_P DSI_TX3_N DGND DSI_TX2_P DSI_TX2_N DGND DSI_TXCLK_P DSI_TXCLK_N DGND DSI_TX1_P DSI_TX1_N DGND DSI_TX0_P DSI_TX0_N AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... - Page 19 Signal DGND 2.6.3 Audio Codec Interface The AM62L EVM houses TI’s TLV320AIC3106 Stereo Audio Codec to interface with AM62L via McASP0 group of signals. TLV320AIC3106 is a low-power stereo audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs programmable in single ended or fully differential configurations.
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Page 20: Figure 2-13. Audio Codec Interface Block Diagram
Figure 2-13. Audio Codec Interface Block Diagram 2.6.4 HDMI Display Interface The DSS (Display Sub system) from the AM62L SoC is used on the EVM to provide HDMI Interface through a standard Type-A Connector. The EVM features a SiI9022A HDMI Transmitter from Lattice Semiconductor to convert the 24bit Parallel RGB DSS output stream as well as McASP0 signals to a HDMI-compliant digital audio and video signal. -
Page 21: Figure 2-14. Hdmi Interface Block Diagram
JTAG signals of cTI header from rest of the EVM. The output of the voltage translators from XDS110 Section and cTI Header Section are muxed and connected to the AM62L JTAG Interface. If a connection to the cTI 20-pin JTAG connector is sensed using an auto presence detect circuit, the mux routes the 20-pin signals from the cTI connector to the AM62L SoC in place of the on-board emulation circuit. -
Page 22: Figure 2-15. Jtag Interface Block Diagram
±12kV air-gap discharge. Table 2-15. JTAG Connector (J10) Pinout Pin No. Signal JTAG_TMS JTAG_TRST# JTAG_TDI JTAG_TDIS VCC_3V3_SYS JTAG_TDO SEL_XDS110_INV_3V3 JTAG_cTI_RTCK DGND JTAG_cTI_TCK DGND JTAG_EMU0 JTAG_EMU1 AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 23: Figure 2-16. Test Automation Interface Block Diagram
DGND 2.6.6 XDS110 Test Automation The AM62L EVM has an optional feature called TEST Automation to allow any external controller to manipulate some basic operations like Power Down, POR, Warm Reset, Bootmode control, etc. through XDS110. Figure 2-16. Test Automation Interface Block Diagram SPRUJG8 –... -
Page 24: Table 2-16. Uart Port Interface
ON position and to a weaker pulldown resistor when set to OFF position. The outputs of the buffer are connected to the bootmode pins on the AM62L SoC and the output is only enabled when the bootmode is needed during a reset cycle. -
Page 25: Figure 2-17. Uart Interface Block Diagram
2.6.8 USB Interface 2.6.8.1 USB 2.0 Type-A Interface USB 2.0 Data lines DP and DM from Type-A connector J23 are connected to the USB1 interface of the AM62L SoC to provide USB high-speed/full-speed communication. USB1_VBUS to the SoC is provided through a resistor divider network to support (5V-30V) VBUS operation. -
Page 26: Figure 2-18. Usb 2.0 Type-A Interface Block Diagram
Figure 2-18. USB 2.0 Type-A Interface block diagram 2.6.8.2 USB 2.0 Type-C Interface On the AM62L EVM, USB 2.0 Interface is offered through USB Type-C Connector J19 manufacturer part number 2012670005 which supports data rate up to 480Mbps. J19 can be used for data communication and also as a power connector sourcing supply to the EVM. -
Page 27: Figure 2-19. Usb 2.0 Type-C Interface Block Diagram
Figure 2-19. USB 2.0 Type-C Interface Block Diagram 2.6.9 MCAN Interface The AM62L EVM includes 3 MCAN interfaces. MAIN_MCAN0, MAIN_MCAN1 and MAIN_MCAN2 shall be terminated to three 1x4 headers – J16, J6 and J18 respectively. For ESD protection, manufacturer part TPD2E001DRLR is connected to TX and RX of MCAN0, MCAN1 and MCAN2. -
Page 28: Figure 2-20. Mcan Interface Block Diagram
Figure 2-20. MCAN Interface Block Diagram 2.6.10 ADC Interface AM62L EVM has four ADC inputs terminated on a 2x5 pin header (J11) with potentiometer connected to A01 pin of the header. ESD Diode, manufacturer part TPD1E10B06DPYR is provided for ADC0_AIN[0:3] signals for ESD protection. -
Page 29: Figure 2-21. Adc Interface Block Diagram
The LPDDR4 memory requires 1.8V for its core supply, thus reducing power demand. The I/Os are supplied from a 1.1V supply output from the PMIC. LPDDR4 reset (Active low) controlled by the AM62L SoC is pulled down to set the default active state. The provision for mounting a pullup resistor is also provided. -
Page 30: Figure 2-22. Lpddr4 Interface Block Diagram
Hardware www.ti.com Figure 2-22. LPDDR4 Interface Block Diagram AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 31: Figure 2-23. Ospi Block Diagram
Reset: The reset for the OSPI NOR flash is connected to a circuit that ANDs the RESETSTATz from the AM62L with the signal GPIO_OSPI_NOR_RSTn from the SoC GPIO. A pullup resistor is provided on GPIO_OSPI_NOR_RSTn to set the default active state. - Page 32 Power: VCC of the QSPI NAND Flash memory is supplied through an on board 1.8V system power. 2.6.11.3 MMC Interfaces The AM62L SoC features three MMC ports (MMC0, MMC1 and MMC2). MMC0 is connected to eMMC, MMC1 is interfaced with a microSD Card connector and MMC2 is terminated to a M.2 Key E expansion connector for Wi-Fi and BT Module Interface.
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Page 33: Figure 2-24. Emmc Interface Block Diagram
The EVM board provides a microSD card Socket of manufacturer part number MEM2051-00-195-00-A connected to the MMC1 port of AM62L SoC. This supports UHS1 operation including I/O operations at both 1.8V and 3.3V. The microSD card interface is set to operate in SD mode by default. For high-speed cards, the ROM Code of the SoC attempts to find the fastest speed that the card and controller can support and then have a transition to 1.8V. - Page 34 2.6.11.3.3 MMC2 - M.2 Key E Interface AM62L EVM has a M.2 Key E expansion for connecting Wi-Fi/BT modules to MMC2, UART1 and McASP0 interface through buffers. This can be used to interface with a Wi-Fi, dual-band, 2.4 and 5GHz module with antennas supporting Industrial temperature grade.
- Page 35 Hardware Figure 2-26. M.2 Interface Block Diagram SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
- Page 36 2.6.11.4 Board ID EEPROM The AM62L EVM board can be identified remotely from its version and serial number data stored on the on-board EEPROM. Board ID memory AT24C512C-MAHM-T from Microchip is interfaced to the I2C0 port of the SoC and is configured to respond to address 0x51 programmed with the header description.
- Page 37 PHY. Depending on the values installed, each of the configuration pins can be set to one of four modes. The AM62L EVM uses the 48-pin QFN package which supports the RGMII interface. SPRUJG8 – FEBRUARY 2025...
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Page 38: Table 2-17. Cpsw Ethernet Phy1 Default Configuration
RGMII RXCLK skew 2.6.13 GPIO Port Expander The I/O Expanders used in the AM62L EVM are 24-Bit I2C based I/O Expander which is used for daughter cards plug-in detection and for generating resets and enable signals to various peripheral devices connected onboard. -
Page 39: Gpio Mapping
2.6.14 GPIO Mapping Table 2-20 describes the detailed GPIO mapping of AM62L Low Power SoC with AM62L EVM peripherals. Table 2-20. Mapping of AM62D Low Power SoC with AM62L Low Power SK EVM peripherals Direction with Voltage Rail Package Signal... -
Page 40: Power
Hardware www.ti.com Table 2-20. Mapping of AM62D Low Power SoC with AM62L Low Power SK EVM peripherals (continued) Direction with Voltage Rail Package Signal Default Active Voltage Domain SL NO. GPIO Description GPIO Netname Functionality GPIO Used Respect to Connected on... - Page 41 Figure 2-29. Power Input Block Diagram 2.7.2 Power Supply The AM62L EVM utilizes an array of DC-DC converters to supply the various memories, clocks, SoC and other components on the board with the necessary voltage and the power required. Figure 2-30 shows the various discrete regulators, PMIC and LDOs used to source power rails for each peripheral on the AM62L EVM board.
- Page 42 The AM62L EVM board includes a power solution based on discrete power supply components. The initial stage of the power supply will be VBUS voltage from either of the two USB Type-C connectors J17 and J19.
- Page 43 5V and 3.3V respectively and the input to the regulators is the PD output. These 3.3V and 5V are the primary voltages for the AM62L EVM Board power resources. The 3.3V supply generated from the Buck regulator LM5141RGET is the input supply to the PMIC, various SoC regulators and LDOs. The 5V supply generated from the Buck Boost regulator TPS630702RNMR is used for powering the on-board peripherals.
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Page 44: Table 2-21. Soc Power Supply
2.7.4 AM62L SoC Power The Core voltage of the AM62L SoC can be 0.75V. Current monitors are provided on all of the SoC Power rails. The SoC has different I/O groups. Each I/O group is powered by specific power supplies as listed in Table 2-21. -
Page 45: Current Monitoring
VDDA_3P3_SDIO 2.7.5 Current Monitoring INA228 power monitor devices are used to monitor current and voltage of various power rails of AM62L SoC. The INA228 interfaces to the AM62L SoC through I2C interface SoC_I2C1_SDA_INA and SoC_I2C1_SCL_INA (which are the level shifted versions of SoC_I2C1_SCL and SoC_I2C1_SDA respectively). TCA9517DR is a I2C level shifter that is used to level shift SoC_I2C1 from VCC_3V3_SYS to VCC_3V3_MAIN. - Page 46 CLKOUT0 pin from the SoC or a 25MHz oscillator, the selection of which is made using a set of resistors. By default, an oscillator is used as an input to the clock buffer on the AM62L EVM. Outputs Y1 and Y2 of the clock buffer are used as reference clock inputs for the two Gigabit Ethernet PHYs.
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Page 47: Reset
The clock required by the HDMI Transmitter can be provided by either on-board oscillator or the SoC’s AUDIO_EXT_REFCLK1, which can be selected through a resistor mux. The 32.768KHz clock to the M.2 module is provided by default from WKUP_CLKOUT0 ball of AM62L SoC. 2.9 Reset... -
Page 48: Expansion Headers
AM62L EVM features two GPIO expansion Headers. 2.10.1 GPIO Expansion Headers The AM62L EVM supports GPIO expansion interface using 10-pin and 30-pin GPIO expansion connectors manufacturer part number 67997-410HLF and manufacturer part number PREC015DAAN-RC respectively. The Following interfaces and I/Os are included on to the 10-pin and 30-pin GPIO expansion connectors: •... -
Page 49: Table 2-24. 10 Pin Gpio Expansion Connector (J3)
GPIO0_40_EXP DGND GPIO0_39_EXP GPIO0_30_EXP DGND SPI3_D0_EXP GPIO0_25_EXP SPI3_CLK_EXP SPI3_D1_EXP DGND DGND UART4_TXD_EXP SPI3_CS0_EXP UART4_RXD_EXP UART4_CTSn_EXP DGND UART4_RTSn_EXP I2C3_SCL_EXP DGND I2C3_SDA_EXP SPI1_CLK_EXP SPI1_D0_EXP SPI1_D1_EXP SPI1_CS0_EXP SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 50: Interrupt
Hardware www.ti.com 2.11 Interrupt The AM62L EVM supports two push buttons for providing reset input and a user generated interrupt to the AM62L SoC. These push buttons placed on the Top side of the Board and are listed in Table 2-26. -
Page 51: Table 2-27. I2C Mapping Table
Figure 2-36. I2C Interface Tree Table 2-27. I2C Mapping Table I2C Port Device/Function Part Number I2C Address Board ID EEPROM AT24C512C-MAHM-T 0x51 SoC_I2C0 DSI Display Connector <connector interface> SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... - Page 52 HDMI Transmitter SiI9022ACNU 0x3B, 0x3F, 0x62 SoC_I2C2 USB PD Controller TPS65988DHRSHR 0x38, 0x3F WKUP_I2C0 PMIC PTPS6521401VAFR 0x30 Others BOOTMODE_I2C I2C Bootmode Buffer TCA6424ARGJR 0x22 AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
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Page 53: Hardware Design Files
To download the PCB guidelines and example layout, see the Design Files page. 3.3 Bill of Materials (BOM) To download the bill of materials (BOM), see the Design Files page. SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 54: Compliance Information
ESD mats when interfacing with the product. The product is used in the basic electromagnetic environment as in laboratory conditions, and the applied standard is as per EN IEC 61326-1:2021. AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 55: Additional Information
USB Implementers Forum, Inc. ® is a registered trademark of SD Card Association. All trademarks are the property of their respective owners. SPRUJG8 – FEBRUARY 2025 AM62L Evaluation Module Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... -
Page 56: Related Documentation
Related Documentation www.ti.com 6 Related Documentation TMDS62LEVM Design File Package AM62L Power Supply Implementation AM62L Evaluation Module SPRUJG8 – FEBRUARY 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated... - Page 57 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 58 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
- Page 59 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
- Page 60 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
- Page 61 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...
- Page 62 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated...
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