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Application Note
AM263x Hardware Design Guide
This document intends to serve as a guide for hardware designers creating PCB systems based on the
AM263x family of MCU devices. This document serves to integrate device-specific schematic and PCB layout
recommendations and examples from the various AM263x evaluation modules (EVM) such as the LP-AM263
Launchpad
™
and TMDSCNCD263 controlCard, with the
Sitara™ Microcontroller Technical Reference Manual
Section
12.
1
Introduction.............................................................................................................................................................................2
1.1 Acronyms...........................................................................................................................................................................
2 Power.......................................................................................................................................................................................
2.1 Discrete DC-DC Power Solution........................................................................................................................................
2.3 Power Decoupling and Filtering ........................................................................................................................................
Consumption...........................................................................................................................................................9
Network................................................................................................................................................9
Power...................................................................................................................................................................15
3
Clocking.................................................................................................................................................................................16
Generation..................................................................................................................................................17
4 Resets....................................................................................................................................................................................
5 Bootstrapping.......................................................................................................................................................................
5.1 SOP Signal Implementation.............................................................................................................................................
5.2 QSPI Memory Controller Implementation........................................................................................................................
5.3 ROM QSPI Boot Requirements.......................................................................................................................................
6 JTAG Emulators and Trace..................................................................................................................................................
7 Multiplexed Peripherals.......................................................................................................................................................
8 Digital Peripherals................................................................................................................................................................
9 Layer Stackup.......................................................................................................................................................................
Features......................................................................................................................................................27
10
Vias.......................................................................................................................................................................................28
Return................................................................................................................................................................28
11.2 1.2 V Core Digital Power................................................................................................................................................
12 References..........................................................................................................................................................................
Trademarks
™
™
Launchpad
and Sitara
Arm
®
and Cortex
®
are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
All trademarks are the property of their respective owners.
SPRABJ8 - SEPTEMBER 2022
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ABSTRACT
Table of Contents
Solution........................................................................................................................................5
Options.................................................................................................................................16
Capacitance........................................................................................................................17
Routing........................................................................................................................................18
Guidelines.................................................................................................................26
Placement.............................................................................................................28
Power......................................................................................................................................31
Power......................................................................................................................................34
are trademarks of Texas Instruments.
Copyright © 2022 Texas Instruments Incorporated
AM263x Sitara™ Microcontroller Data
and other collateral documents and tools, as shown in
Table of Contents
Sheet,
AM263x
AM263x Hardware Design Guide
3
3
3
5
18
20
20
21
24
24
25
26
26
29
37
1
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Summary of Contents for Texas Instruments AM263 Series
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Page 1: Table Of Contents
Arm Limited (or its subsidiaries) in the US and/or elsewhere. All trademarks are the property of their respective owners. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 2: Introduction
Ethernet PHY #2 RJ-45 MCAN PHY CAN Network MCAN1 DP83869HMRGZT TCAN1042HGVDQ1 Figure 1-1. Typical AM263x System Block Diagram (Based on LP-AM263 Launchpad Design) AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 3: Acronyms
It is also recommended to use the power-good generation circuits available on these and similar DC-DC regulators to drive the power on reset (PORz) into the AM263x. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 4 0.8 V reference voltage for R154 internal comparator 10µF 10µF 4.99k Figure 2-2. AM263x LP-AM263 Schematic Excerpt 1.2 V Core Power Implementation AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 5: Integrated Pmic Power Solution
Simulations and measurements should ideally be done with target application software active, and intended operating environment conditions applied to the system. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 6 Ferrite Bead, 120 Ω @ 742792625 Wurth 100 MHz, 2 A, 0603 0.01 µF, 50 V, ± 10%, CGA2B3X7R1H103K050B X7R, AEC-Q200 Grade 1, 0402 AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 7 3.3uF 0.1uF 3.3uF 0.1uF 0.1uF 0.1uF Figure 2-6. AM263x LaunchPad Excerpt – 3.3 V Digital I/O and Analog I/O Decoupling and Filtering Schematic SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 8 AM263_ADC_VREFHI_G2 4.7µF 6.3V AM263_ADC_VREFLO_G2 0.1uF DAC_VREF 4.7µF 6.3V 6.3V 0.1uF 0.1uF Figure 2-8. AM263x LaunchPad Excerpt – ADC and DAC VREF Decoupling Schematic AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 9: Power Consumption
Specification Failing Specifications Target Zmax Passing Specifications PDN Frequency Response Frequency (Hz) Target Fmin Fmax Figure 2-9. AM263x PDN Requirements – Example Diagram SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 10 1 R5F clock cycle VDDA18LDO VDDA18LDO Baseline, BASELINE1 simple transient model assuming 0 to peak transition in minimal 1 R5F clock cycle AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 11 Ansys SI wave. Wide-band s-parameter models of each of the selected capacitors were taken from the manufacturer. Simulations capture only 25°C (room temperature) PCB and capacitor model performance. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 12 Figure 2-10. AM263x LaunchPad PDN Simulations – 1.2 V Core Power Simulation Domain Figure 2-11. AM263x LaunchPad PDN Simulations – 1.2 V Core Power Simulated Z11 AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 13 FL18 ferrite bead element was used to separate these two decoupling performance simulations. Figure 2-12. AM263x LaunchPad PDN Simulations – 3.3 V Digital/Analog I/O Power Simulation Domain SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 14 Figure 2-13. AM263x LaunchPad PDN Simulations – 3.3 V Digital/Analog I/O Power Simulation Domain (layer 8, bottom) Figure 2-14. AM263x LaunchPad PDN Simulations – 3.3 V Digital I/O Power Simulated Z11 AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 15: E-Fuse Power
For the full VPP electrical requirements and e-Fuse programming sequence, please see the AM263x datasheet, section7.8 “VPP Specifications for One-Time Programmable (OTP) eFuses”. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 16: Clocking
1.8 V square-wave clock to the XTAL_XI pin. The LMK1C1104PWR is also used to provide a clock source to the onboard Ethernet PHY as well. AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 17: Output Clock Generation
For full crystal loading tolerances, see the AM263x Sitara™ Microcontroller Data Sheet. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 18: Crystal Placement And Routing
Microcontroller Data Sheet. AM263_PORZ_PB AM263_PORZ_PB PG_VDD_1V2 AM263_PORZ PG_VDD_1V2 PG_VSYS_3V3 PG_VSYS_3V3 VSYS_3V3 10.0k 0.1uF Figure 4-1. Excerpt From AM263x Launchpad Schematic – PORZ Generation AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 19 WARMRSTN without conflicting with the reset status output which is used to reset the Ethernet PHY onboard during initial board power-on. Figure 4-3. Excerpt From AM263x Control Card Schematic – WARMRESETN Push-Button Open-Drain Driver SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 20: Bootstrapping
SOP path will only minimally impact the functional mode operation of the signals, as shown in Figure 5-2 Figure 5-3. AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 21: Qspi Memory Controller Implementation
Include a pull resistor to disable hold mode by default • As shown in Section 5.1, ensure that SOP signals do not impose long stubs on the SOP/QSPI multiplexed signals. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 22 Figure 5-4. Excerpt From AM263x Launchpad Schematic – AM263x QSPI Controller and S25FL128SAGNFI000 NOR Flash Memory Figure 5-5. Excerpt From AM263x Launchpad Layout – Highlighting SOP0/QSPI_D0 Path and SOP Isolation Resistor AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 23 QSPI data pins of the attached memory to control rise-time and reflections of the data lines. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 24: Rom Qspi Boot Requirements
Samtec QSH-030-01-L-D-A. This implementation is compatible with TI XDS560v2 JTAG/Trace pods as well as other third-party JTAG/Trace pods. Additional, TI JTAG debugger connections can be found in [8]. AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 25: Multiplexed Peripherals
SYSCONFIG can be utilized for checking For more details, see https://www.ti.com/tool/SYSCONFIG. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 26: Digital Peripherals
However, these have not yet been explored by TI at this time. The LP-AM263 LaunchPad EVM represents the most optimized stackup example at this time, so the LaunchPad is referenced in this section. Figure 9-1. LP-AM263 Stackup AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 27: Key Stackup Features
6.800 120.000 120.030 Coated Microstrip All impedance calculated using Polar 2D field solver on given copper and dielectric thicknesses, widths and dissipation constants. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 28: Vias
In this case, only large format, 15 mil wide traces were still utilized. Figure 11-1. AM263x controlCARD Excerpt – Ground Return Vias Under AM263x BGA Layer 1 and Layer AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 29: Core Digital Power
Smaller packaged, higher-frequency decoupling capacitance should be placed directly on BGA fan-out vias with as small of a dog-bone to power and ground return vias as possible SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 30 Figure 11-3. AM263x controlCARD Excerpt – 1.2 V Core Power Output, Power Plane Vias and BGA Vias Figure 11-4. AM263x controlCARD Excerpt – 1.2 V Core Power Plane, Layer 5 AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 31: Digital And Analog Power
FL13 and associated capacitors. This is used to create a low-IR drop low-pass filter that attenuates the higher frequency switching harmonics of the TPS62913RPUR regulator. SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 32 Figure 11-7. AM263x controlCARD Excerpt – 3.3 V Digital and Analog Power Planes on Layer 5 and Layer AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 33 Figure 11-9. AM263x controlCARD Excerpt – Common 3.3 V Plane Transition Vias Figure 11-10. AM263x controlCARD Excerpt – 3.3 V Digital and Analog Planes Layer 6 SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 34: Digital And Analog Power
Smaller packaged, higher-frequency decoupling capacitance should be placed directly on BGA fan-out vias with as small of a dog-bone to power and ground return vias as possible AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 35 Figure 11-12. AM263x controlCARD Excerpt – 1.8 V Digital Power Via Fan-Out and Plane Routing Layer 6 Figure 11-13. AM263x controlCARD Excerpt – 1.8 V Digital Power Decoupling on Layer 10 SPRABJ8 – SEPTEMBER 2022 AM263x Hardware Design Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 36 EVM. Figure 11-15. AM263x controlCARD Excerpt – 1.8 V Analog Power Decoupling on Layer 10 AM263x Hardware Design Guide SPRABJ8 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 37: References
AM263x Sitara™ Microcontroller Technical Reference Manual Addendum 4. AM263x Control Card EVM Design: https://www.ti.com/tool/TMDSCNCD263 5. AM263x Launchpad EVM Design: https://www.ti.com/tool/LP-AM263 6. Texas Instruments System Configuration Tool (SYSCONFIG): https://www.ti.com/tool/SYSCONFIG 7. MIPI Alliance Recommendation for Debug and Trace Connectors: https://www.mipi.org/sites/default/files/ MIPI-Alliance-Recommendation-Debug-Trace-Connectors.pdf 8. JTAG Connectors and Pinout: https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/... - Page 38 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 39 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
- Page 40 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
- Page 41 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
- Page 42 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated...
- Page 43 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...
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