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User's Guide
AM64x/AM243x EVM User's Guide
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Introduction.............................................................................................................................................................................3
1.1 EVM Revisions and Assembly Variants.............................................................................................................................
1.2 Inside the Box....................................................................................................................................................................
Notes...........................................................................................................................................................4
2.1 Power-On Usage Note.......................................................................................................................................................
2.2 EMC, EMI, and ESD compliance.......................................................................................................................................
3 System Description................................................................................................................................................................
Features......................................................................................................................................................................6
3.2 Functional Block Diagram..................................................................................................................................................
3.3 Power-On/Off Procedures..................................................................................................................................................
Procedure...................................................................................................................................................9
3.3.2 Power-Off Procedure.................................................................................................................................................
3.4.1 Clocking.....................................................................................................................................................................
3.4.1.1 Ethernet PHY Clock............................................................................................................................................
3.4.1.2 AM64x/AM243x Clock.........................................................................................................................................
3.4.1.3 PCIe Clock..........................................................................................................................................................
3.4.2 Reset.........................................................................................................................................................................
3.4.3 Power........................................................................................................................................................................
Input.........................................................................................................................................................13
3.4.3.2 Reverse Polarity Protection................................................................................................................................
3.4.3.3 Current Monitoring..............................................................................................................................................
Supply......................................................................................................................................................14
Sequencing..............................................................................................................................................16
3.4.3.6 AM64x/AM243x Power.......................................................................................................................................
3.4.4 Configuration.............................................................................................................................................................
Modes.........................................................................................................................................................18
3.4.5
JTAG..........................................................................................................................................................................22
Automation.........................................................................................................................................................25
3.4.7 UART Interfaces........................................................................................................................................................
Interfaces.....................................................................................................................................................29
3.4.8.1 DDR4 Interface...................................................................................................................................................
Interfaces...................................................................................................................................................30
3.4.8.3 OSPI Interface....................................................................................................................................................
3.4.8.5 Board ID EEPROM Interface..............................................................................................................................
3.4.9 Ethernet Interface......................................................................................................................................................
3.4.9.3 Ethernet LED......................................................................................................................................................
Interface......................................................................................................................................................42
Interface.....................................................................................................................................................43
Interface..........................................................................................................................................................43
3.4.13 High Speed Expansion Interface.............................................................................................................................
3.4.14 CAN Interface..........................................................................................................................................................
3.4.15 Interrupt...................................................................................................................................................................
3.4.16 ADC Interface..........................................................................................................................................................
Connector.....................................................................................................................................................55
3.4.18 SPI Interfaces..........................................................................................................................................................
3.4.19 I2C Interfaces..........................................................................................................................................................
3.4.20 FSI Interface............................................................................................................................................................
SPRUJ63 - SEPTEMBER 2022
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Table of Contents
Description..................................................................................................................11
Interface.......................................................................................................................................32
Configuration..................................................................................................................35
Configuration..................................................................................................................35
Copyright © 2022 Texas Instruments Incorporated
Table of Contents
AM64x/AM243x EVM User's Guide
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Summary of Contents for Texas Instruments AM64x
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Page 1: Table Of Contents
3.4.13 High Speed Expansion Interface..........................3.4.14 CAN Interface................................3.4.15 Interrupt................................... 3.4.16 ADC Interface................................3.4.17 Safety Connector..............................55 3.4.18 SPI Interfaces................................3.4.19 I2C Interfaces................................3.4.20 FSI Interface................................SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 2 Table of Contents www.ti.com 4 Known Issues and Modifications............................4.1 Issue 1 - Embedded XDS110 Connection to AM64x Target in CCS................4.2 Issue 2 - DC Barrel Jack Warning when Hot-Plugging.....................60 5 References.................................... 6 Revision History................................... List of Figures Figure 3-1. Top View of the AM64x/AM243x EVM Board......................
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Page 3: Introduction
Industrial Ethernet, standard Ethernet, PCIe, Fast Serial Interface (FSI) and others to easily create prototypes. An on-board display makes use of AM64x/ AM243x serial peripheral interface (SPI) ports to provide the ability for local visual outputs in addition to the various LED provided. -
Page 4: Evm Revisions And Assembly Variants
1.1 EVM Revisions and Assembly Variants The various AM64x/AM243x EVM PCB design revisions, and asssembly variants are listed in the table below. Specific PCB revision is indicated in silkscreen on the PCB. Specific assembly variant is indicated with additional sticker label. -
Page 5: System Description
System Description 3 System Description The following sections describe the AM64x/AM243x EVM design. Top-down and bottom-up views of the PCB are provided in Figure 3-1 Figure 3-2 for reference to major IC and connector component locations. Figure 3-1. Top View of the AM64x/AM243x EVM Board SPRUJ63 –... -
Page 6: Key Features
3.1 Key Features AM64x System-on-Chip (SoC): ® ® • AM64x combines two instances of Sitara’s gigabit TSN-enabled PRU-ICSSG with up to two Arm Cortex A53 cores, up to four Cortex-R5F MCUs, and a single Cortex-M4F MCU AM243x Microcontroller (MCU): •... - Page 7 • Quad port Universal Asynchronous Receiver/Transmitter (UART) to USB circuit over microB USB connector • Two I2C ports SoC_I2C0 and SoC_I2C1 connected to test headers for peripheral testing of the AM64x device • 4x Push Buttons: – 1x SoC Warm RESET –...
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Page 8: Functional Block Diagram
3.2 Functional Block Diagram Figure 3-3 shows the functional block diagram of the AM64x/AM243x EVM. Figure 3-3. General Processor Board Functional Block Diagram Note Diagram is compatible with both the AM6442 MPU and the AM2434 MCU version of the system. -
Page 9: Power-On/Off Procedures
TI's recommendation on an appropriate AC/DC power converter for your EVM revision. CAUTION To avoid high inrush currents, and prevent possible damage to the AM64x/AM243x EVM components, the following EVM power on and power off procedures should be utilized. 3.3.1 Power-On Procedure 1. -
Page 10: Power-Off Procedure
1. Switch EVM power switch (SW1) to OFF position. 2. Disconnect AC power from AC/DC converter. 3. Remove DC power plug from EVM power jack (J6). AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 11: Peripheral And Major Component Description
Crystal of 25 MHz (ABM10W-25.0000MHZ-8-K1Z-T3) is provided on EVM as reference clock for the AM64x/ AM243x device. An optional output from the buffer driving the AM64x/AM243x is provided. Selection of clock for SoC is done using resistors. By default, an output from clock buffer SoC_CLKIN is provided to SoC. -
Page 12: Reset
Figure 3-5. This ensures that the peripheral reset is asserted until the SoC is out of reset and allows the AM64x to manually assert reset to the peripheral. Figure 3-5. Overall Reset Architecture of the AM64x/AM243x EVM AM64x/AM243x EVM User's Guide SPRUJ63 –... -
Page 13: Power
Board Power off 3.4.3.3 Current Monitoring INA226 power monitor devices are used to monitor current and voltage of various power rails of AM64x/AM243x processor. The INA226 interfaces to the AM64x/AM243x through I2C interface. Four terminal, high precision shunt resistors are provided to measure load current. -
Page 14: Power Supply
TP56 VPP_DDR_2V5 TP47 2.5 V VDDR_VTT TP48 0.6 V VCC1V8 TP51 1.8 V VPP_1V8 TP52 1.8 V AM243x EVM should be 0.85 V. AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 15: Table 3-5. Power Leds
LD24 After SW1 TURN ON VCC_5V0 LD15 VCC3V3_PREREG VCC_3V3_SYS VDD_2V5 VDD_1V1 LD10 VDDA1V8 VDD_CORE VCC_CORE VDD_2V8 LD25 VCC1V2_DDR Figure 3-6. Power Good LEDs SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 16: Power Sequencing
Power Up and Power Down sequence of all the Power supplies present on the EVM Board. Figure 3-7. Power ON and OFF Sequencing AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 17: Am64X/Am243X Power
System Description 3.4.3.6 AM64x/AM243x Power The Core voltage of the AM64x/AM243x can be powered by 0.75 V or 0.8 V or 0.85 V based on the power optimization requirement. It is recommended to use a single voltage source when the SoC... -
Page 18: Configuration
Switch set to “ON” corresponds to logic “HIGH” while “OFF” corresponds to logic “LOW”. For a full description of all AM64x SoC supported bootmodes, see the AM64x Sitara™ Processors Data Manual AM64x Processors Silicon Revision 1.0 Texas Instruments Families of Products Technical Reference... -
Page 19: Figure 3-9. Am64X/Am243X Evm Schematic Excerpt, Boot Mode Selection Switches (Sw2, Sw3)
System Description Figure 3-9. AM64x/AM243x EVM Schematic Excerpt, Boot Mode Selection Switches (SW2, SW3) Figure 3-10. AM64x/AM243xEVM PCB, Boot Mode Selection Switches (SW2, SW3) The BOOTMODE pins provide means to select the boot mode before the device is powered up. They are divided... -
Page 20: Table 3-7. Bootmode Bits
SW2.7 SW2.6 SW2.5 SW2.4 Selected RSVD OSPI QSPI RSVD RSVD UART MMC/SD Card eMMC GPMC NAND GPMC NOR PCIe xSPI No-boot / Dev-boot AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 21: Table 3-10. Primary Boot Media Configuration Bootmode[9:7]
Table 3-12. Backup Boot Media Configuration BOOTMODE[13] SW3.6 Boot Device RSVD None Mode RSVD RSVD RSVD UART RSVD RSVD Port MMC/SD RSVD RSVD BOOTMODE[14:15] - Reserved SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 22: Jtag
Table 3-14. TI20 Pin Connector (J25) Pin-Out Pin No. Signal Pin No. Signal JTAG_CTI_TMS JTAG_CTI_TCK JTAG_TRSTN DGND JTAG_CTI_TDI JTAG_EMU0 JTAG_TDIS JTAG_EMU1 VCC_3V3_SYS JTAG_EMU_RSTN DGND JTAG_TDO SEL_XDS110_INV JTAG_CTI_RTCK DGND DGND AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 23: Figure 3-11. Jtag Interface
System Description Figure 3-11. JTAG Interface SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 24: Table 3-15. Ti 60-Pin Connector (J33) Pin-Out
MIPI_TRC_DAT12 DGND MIPI_TRC_DAT13 DGND MIPI_TRC_CTL MIPI_TRC_DAT14 MIPI_TRC_DAT19 MIPI_TRC_DAT00 MIPI_TRC_DAT15 MIPI_TRC_DAT20 MIPI_TRC_DAT01 MIPI_TRC_DAT16 MIPI_TRC_DAT21 MIPI_TRC_DAT02 MIPI_TRC_DAT17 MIPI_TRC_DAT22 MIPI_TRC_DAT03 MIPI_TRC_DAT18 MIPI_TRC_DAT23 MIPI_TRC_DAT04 DGND SEL_XDS100_INV MIPI_TRC_DAT05 AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 25: Test Automation
The other I2C interface is connected to the current measurement and temperature sensing devices present on the I2C1 port of the SoC. The Test Automation connector is used by Texas Instruments for control of software regression testing and comparative power measurements. The connector is provided to allow customers to develop their own testing and power measurements of customer applications. -
Page 26: Figure 3-12. Test Automation Header
System Description www.ti.com Figure 3-12. Test Automation Header AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 27: Table 3-17. Test Automation Header (J38) Pin-Out
Bidirectional TEST_GPIO2 Bidirectional TEST_GPIO3 Input TEST_GPIO4 Input DGND Ground SOC_I2C1_SCL Bidirectional BOOTMODE_I2C_SCL Bidirectional SOC_I2C1_SDA Bidirectional BOOTMODE_I2C_SDA Bidirectional DGND Ground DGND Ground DGND Ground SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 28: Uart Interfaces
Edit Mode is used to edit the settings of an EEPROM template • Program Mode is used to Program and Erase the device EEPROM(s). Figure 3-13. AM64x/AM243xUART Interfaces AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 29: Memory Interfaces
(single chip). The placement and routing of the DDR4 device will be point to point with VTT termination. The DDR4 requires 1.2V and thus reduces power demand. Figure 3-14. AM64x/AM243x DDR4 Interface SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright ©... -
Page 30: Mmc Interfaces
SD card interface. 3.4.8.2.1 Micro SD Interface The processor board provides an uSD card interface connected to MMC1 port of AM64x SoC. The uSD card interface supports UHS1 operation including operations at both 1.8V and 3.3V IO levels.. The AM64x SoC includes a circuit to generate the uSD voltage based on IO level negotiation with the uSD card. -
Page 31: Ospi Interface
3.4.8.2.2 eMMC Interface The processor card supports eMMC Flash memory (part number Micron MTFC16GAPALBH-IT), connected to MMC0 port of the AM64x processor. The flash is connected to 8 bits of the MMC0 interface supporting HS400 double data rates up to 200 MHz. -
Page 32: Spi Eeprom Interface
Figure 3-17. AM64x/AM243x OSPI Interface 3.4.8.4 SPI EEPROM Interface A 1-Kbit SPI EEPROM (93LC46B) is interfaced to SPI0 port of AM64x/AM243x processor. It is used for testing purpose. 3.4.8.5 Board ID EEPROM Interface The EVM includes an onboard EEPROM (U7). This EEPROM holds identifying information include the EVM version and serial number. -
Page 33: Ethernet Interface
Payload type Length Size of payload MAC control MAC header control word MAC_adrs MAC address of AM64x/AM243x PRG2 END_LIST TYPE End Marker 3.4.9 Ethernet Interface Three Ethernet PHYs terminated to RJ45 connectors with integrated magnetics is supported on the EVM. -
Page 34: Figure 3-19. Ethernet Interface - Icssg Domain
CPSW_RGMII1 used for the first PHY). Hence the same DP83869 (48pin) PHY is used for this port as well. Figure 3-19. Ethernet Interface - ICSSG Domain AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 35: Dp83867 Phy Default Configuration
Mode 4 – 2.2902 V to 2.904 V DP83867 device includes internal pull-down resistor. The value of the external pull resistors is selected to provide voltage at the pins of the AM64x/AM243x as close to ground or 3.3V as possible. The strapping is shown Figure 3-21... -
Page 36: Table 3-19. Default Strap Setting Of Cpsw Ethernet Phy
Interrupt: The interrupt from two ICSSG PHYs from PRG1 domain are tied together and is connected to EXTINTN pin of the AM64x/AM243x. An option for connecting the interrupt from CPSW PHY to the PRG1 ICSSG Interrupt pins is also provided. - Page 37 LED1 is connected to RJ45 LED (Green) to indicate 1000 MHz speed LED2 is connected to RJ45 LED (Yellow) to indicate transmit/receive activity. SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 38: Figure 3-20. Am64X/Am243Xethernet Interfaces - Cpsw Ethernet Strap Settings
System Description www.ti.com Figure 3-20. AM64x/AM243xEthernet Interfaces - CPSW Ethernet Strap Settings AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 39: Figure 3-21. Am64X/Am243X Ethernet Interfaces - Icssg1 Ethernet Strap Settings
System Description Figure 3-21. AM64x/AM243x Ethernet Interfaces - ICSSG1 Ethernet Strap Settings SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 40: Figure 3-22. Am64X/Am243X Ethernet Interfaces - Icssg2 Ethernet Strap Settings
System Description www.ti.com Figure 3-22. AM64x/AM243x Ethernet Interfaces - ICSSG2 Ethernet Strap Settings Note Resistors that are highlighted by red color box are DNI components. AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 41: Ethernet Led
LED’s that are connected to an IO Expander, which is controlled by the SoC via the I2C1 port. These eight LED can be toggled based on the user application. Figure 3-23. AM64x/AM243x EVM Ethernet Interface LED SPRUJ63 – SEPTEMBER 2022... -
Page 42: Display Interface
FPC connector on the EVM having part number 10051922-1410ELF from Amphenol ICC and the pin details are mentioned in Table 3-21. Table 3-21. Display Connector (J36) Pin-Out Pin No. Signal VDDB RES# IREF VCOMH AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 43: Usb 2.0 Interface
PCIe connector through 3 pin header. A jumper is mounted for the connectivity. Whereas in case of PCIe end point operation, the AM64x SoC receives reset signal from the add-on card and passed on to the MCU_PORz pin. The reset signal is connected to 3 pin header and the selection should be made with a jumper. -
Page 44: Figure 3-25. Am64X/Am243X Pcie Interface
Table 3-22. PCIe Jumper Options to Enable Root Complex and Endpoint Mode Root Complex End Point 1x3 header J34 and J35 Short 1 and 2 Short 2 and 3 Figure 3-25. AM64x/AM243x PCIe Interface Table 3-23. PCIe Connector (J27) Pin-out Side A of PCIe Side B of PCIe Pin No. Connector... -
Page 45: High Speed Expansion Interface
FSI_TX0 signals and FSI_RX0 signals are connected to the mux. The mux is controlled by jumper. The default state drives the signals from the AM64x/AM243x to the HSE connector unless the jumper is installed. The boards will be delivered with the jumper installed. -
Page 46: Table 3-24. Selection Of Prg0 Signals On Application Connector
TRC_DATA7, GPIO0_24, PRG0_PWM2_B2, BOOTMODE09 GPMC0_AD8 FSI_RX0_CLK , UART2_CTSn, EHRPWM2_A, TRC_DATA6, GPIO0_23, PRG0_PWM2_A2, BOOTMODE08 DGND DGND DGND VCC3V3_IO_HSE VCC3V3_IO_HSE VCC3V3_IO_HSE SOC_SPI1_CLK EHRPWM6_SYNCI, GPIO1_49 VCC1V8_HSE VCC1V8_HSE DGND AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 47 HSE_PRG0_PRU1_GPO17 PRG0_PRU1_GPI17, PRG0_IEP1_EDC_SYNC_OUT1 , PRG0_PWM1_B2, RGMII1_RD3, RMII1_TXD1, GPIO1_37, PRG0_ECAP0_SYNC_OUT, PRG0_ECAP0_SYNC_IN HSE_MCAN1_RX/I2C3_SDA ECAP2_IN_APWM_OUT, OBSCLK0, TIMER_IO5, UART5_TXD, EHRPWM_SOCB, GPIO1_63, EQEP2_B, UART0_DSRn DGND SOC_I2C0_SCL UART6_CTS, GPIO1_64 SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 48 PRG0_PRU0_GPI19, PRG0_IEP0_EDC_SYNC_OUT0, PRG0_PWM0_TZ_OUT, CPTS0_TS_COMP, CP_GEMAC_CPTS0_TS_COMP, EHRPWM8_B, GPIO1_19, UART4_RTSn, GPMC0_A6, UART3_RXD PRG0_PRU0GPO0 PRG0_PRU0_GPI0, PRG0_RGMII1_RD0, PRG0_PWM3_A0, GPIO1_0, UART2_CTSn PRG0_PRU1GPO4 PRG0_PRU1_GPI4, PRG0_RGMII2_RX_CTL, PRG0_PWM2_B2, GPIO1_24, EQEP1_B, UART6_TXD AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 49 PRG0_PWM3_A1, GPIO1_6, UART4_CTSn PRG0_PRU1GPO2 PRG0_PRU1_GPI2, PRG0_RGMII2_RD2, PRG0_PWM2_A2, GPIO1_22, EQEP0_S, UART5_RTSn DGND PRG0_PRU1GPO11 PRG0_PRU1_GPI11, PRG0_RGMII2_TD0, GPIO1_31, EQEP2_I, UART4_RXD PRG0_PRU0GPO15 PRG0_PRU0_GPI15, PRG0_RGMII1_TX_CTL, PRG0_PWM0_B1, SPI3_CS1, GPIO1_15, GPMC0_A16 DGND SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 50 FSI_RX1_CLK, UART5_CTSn, EQEP1_A, TRC_DATA9, GPIO0_26, EHRPWM7_A, BOOTMODE11 DGND HSE_PRG0_PRU1_GPO9 PRG0_PRU1_GPI9, PRG0_UART0_RXD, RGMII1_RD1, PRG0_IEP0_EDIO_DATA_IN_OUT30, GPIO1_29, EQEP0_I, UART5_RXD HSE_MCAN0_RX/UART4_TXD UART4_TXD, TIMER_IO3, SYNC3_OUT, SPI4_CS2, GPIO1_61, EQEP2_S, UART0_RIn AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 51: Figure 3-26. Am64X/Am243X High Speed Expansion Connector
Pin Multiplexed Signal Functions DGND HSE_GPIO0_38 HSE_PRG0_PRU1_GPO10 PRG0_PRU1_GPI10, PRG0_UART0_TXD, PRG0_PWM2_TZ_IN, RGMII1_RD2, RMII1_TXD0, PRG0_IEP0_EDIO_DATA_IN_OUT31, GPIO1_30, EQEP1_I, UART6_RXD DGND DGND MCU_PORZ Figure 3-26. AM64x/AM243x High Speed Expansion Connector SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 52 System Description www.ti.com Figure 3-27. AM64x/AM243x High Speed Expansion Connector - Part 1 AM64x/AM243x EVM User's Guide SPRUJ63 – SEPTEMBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 53: Can Interface
CAN interface using TCAN1042HGV. RXD and TXD pins are connected to MCAN0_RX/ UART4_TXD and MCAN0_TX/UART4_RXD pins of AM64x respectively. STB pin of the IC is by default connected to ground to avoid IC entering stand-by mode. The STB pin is controlled by GPIO to enable Standby mode. -
Page 54: Interrupt
Power on reset input can be applied though switch SW7. 3.4.16 ADC Interface A 20-pin connector J3 of part number TSW-110-07-S-D for connecting ADC signals of the AM64x/AM243x. The connector includes ADC0_AIN0-7, VDDA_ADC connections and ground connections. Table 3-26. ADC Connector (J3) Pin-out Pin No. -
Page 55: Safety Connector
CONN_MCU_PORZ 3.4.18 SPI Interfaces • SPI0: A 1Kbit SPI EEPROM (93LC46B) is interfaced to SPI0 port of the AM64x/AM243x. It is used for testing purposes. • SPI1: This interface is routed to the HSE Connector. The SPI1 interface signals are at a 3.3 V IO level. -
Page 56: Figure 3-30. Am64X/Am243X I2C Interfaces And Address Assignment Of Peripherals
Temperature sensor with part number TMP100, Display Interface with part number OSD9616P0992-10, Test automation connector via voltage isolation. This I2C is also connected to a test header J4 for AM64x processor slave operation. Pin outs of I2C test header is given in Table 3-29. -
Page 57: Fsi Interface
Table 3-30. FSI (J5) Connector Pin-out Pin No. Signal FSI_TX0_CLK FSI_RX0_CLK DGND DGND FSI_TX0_D0 FSI_RX0_D0 FSI_TX0_D1 FSI_RX0_D1 DGND VCC_3V3_SYS Figure 3-31. AM64x/AM243x FSI Interface SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 58: Figure 4-1. Am64X/Am243X Evm Modification Label Location
Issue Description: On some EVM, the embedded XDS110 (U59) has been shown to fail initial target connection to AM64x target in CCS after first EVM and XDS110 power cycle. No problem exists when using an attached, external emulator over the CTI20 header (J25). -
Page 59: Figure 4-2. Xds110 Ccs Connection Error Dialog
PC. A similar tool is available under the Linux OS install of CCS. Figure 4-3. XDS110 debug reset utility command-line function SPRUJ63 – SEPTEMBER 2022 AM64x/AM243x EVM User's Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 60 5 References • AM64x Sitara™ Processors Data Manual • AM64x Processors Silicon Revision 1.0 Texas Instruments Families of Products Technical Reference Manual 6 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE...
- Page 61 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...
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