Analog Devices AD-ACEVSE22KWZ-KIT User Manual page 4

User Guide
BLOCK DIAGRAM
Figure 2 shows the block diagram of the board design. Dashed
lines indicate the isolation barrier of the design. The section on
top of the dashed line is the high voltage section in the design.
Anything below the dashed line is low voltage. The protective earth
is shown on the low voltage side below the dashed line. Current
and voltage measurement on phases A, B, and C are performed
after the input AC power supply and after the relay to remove
losses from the on-board circuitry from the energy measurement.
It is performed after the relay, just before the connector to the EV.
This means metrology should always be read as zero when the
relay is open. Voltage is also measured before the relay on each
phase. The difference between the two voltage measurements can
be used to detect stuck relay events. PEN fault detection is also
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performed using these voltage dividers on the input side of the
relay. The relay is controlled by the charge control state machine
running on the microcontroller. The control pilot and proximity pilot
functionalities are implemented according to the IEC61851-1 stand-
ard to establish low level communication with an EV communication
controller. The onboard FRAM stores calibration and configuration
parameters for the ADC. A MAXQ1065 cryptographic coprocessor
is included on the board to store private and public keys for
elliptic curve Diffie-Hellman key exchange (ECDHE). A MAX31343
real-time clock (RTC) is included to generate accurate timestamps
to send to the host controller. A MAX33046 RS-485 transceiver chip
is included to provide an interface to access and modify ADE9178
registers to configure it for a charge session.
Figure 2. System Block Diagram
AD-ACEVSE22KWZ-KIT
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