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Summary of Contents for Texas Instruments SLVP128
- Page 1 High Performance Synchronous Buck EVM Using the TPS56100 in Systems With Only 5 V Available User’s Guide July 1999 Mixed Signal Products SLVU018...
- Page 2 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
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Page 3: Read This First
Chapter 2 Test Results shows the test setups used, and the test results obtained, in designing the SLVP128 EVM. Chapter 3 Schematic contains the schematic diagram for the SLVP128 EVM. Chapter 4 Physical Layouts contains the board layout, and assembly drawings for the SLVP128 EVM. -
Page 4: Information About Cautions And Warnings
Information About Cautions and Warnings Information About Cautions and Warnings This book may contain cautions and warnings. This is an example of a caution statement. A caution statement describes a situation that could potentially damage your software or equipment. This is an example of a warning statement. A warning statement describes a situation that could potentially cause harm to you. -
Page 5: Table Of Contents
Running Title—Attribute Reference Contents Introduction ..............Background . - Page 6 2–2 SLVP128 Measured Load and Line Regulation ........
- Page 7 5–1 SLVP128 Bill of Materials ............
- Page 8 viii...
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Page 9: Introduction
Chapter 1 Introduction Topic Page Background ..........Performance Specification Summary . -
Page 10: Background
[3]. Parasitic interconnect impedances between the power supply and the processor must be kept to a minimum. Fast responding syn- chronous buck dc/dc converters controlled by the Texas Instruments TPS56100 hysteretic controller are ideally suited for microprocessor power applications requiring fast response and precise regulation of rapidly changing loads. -
Page 11: Performance Specification Summary
Performance Specification Summary 1.2 Performance Specification Summary This section summarizes the performance specifications of the SLVP128 converter. Table 1–1 gives the performance specifications of the converters. Table 1–1. Performance Specification Summary Specification Test Units Conditions Input voltage range Output voltage range... -
Page 12: Voltage Programming Code
Voltage Programming Code 1.3 Voltage Programming Code A voltage programming network (VP) consisting of a 5–bit DAC pro- grams the regulated voltage within a range from 1.3 V to 2.6 V. The out- put voltage for a given VP Code is shown in Table 1–2. Table 1–2. - Page 13 Voltage Programming Code Table 1–2. Voltage Programming Code (Continued) VP Terminals VREF (0 = GND, 1 = floating or pull-up to 5 V) (Vdc) 2.60 2.60 2.60 Note: If the VP bits are set to 11111, then the high-side and low-side driver outputs will be set low. Introduction...
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Page 15: Test Results
Chapter 2 Test Results This chapter shows the test setups used, and the test results obtained, in de- signing the SLVP128 EVM. Topic Page Test Summary .......... -
Page 16: Test Summary
Test Summary 2.1 Test Summary The detailed test results and waveforms are presented in Figure 2–2 to Figure 2–7 for the SLVP128. The following are summarized results. 2.1.1 Static Line and Load Regulation The precise reference voltage regulator implemented in the TPS56100 controller using both positive and negative remote sense pins provides excellent regulation characteristics. -
Page 17: Conclusion
Figure 2–5. 2.1.6 Conclusion The test results of the SLVP128 EVM demonstrate the advantages of the TPS56100 controller to meet stringent supply requirements to power supplies, especially for powering DSPs and microprocessors. The power system designer has a good solution to optimize the system for his particular application. -
Page 18: Test Setup
0.020 V. 5) For subsequent testing, ensure the lab supply output current capacity and current limit are at least 5 A so that the SLVP128 can be operated at maxi- mum load of 6 A. 6) Refer to the Test Results for selected typical waveforms and operating conditions for verification of proper module operation. -
Page 19: Slvp128 Test Setup
Test Setup Figure 2–1. SLVP128 Test Setup Power Supply VSENSE+ VSENSE– 5–V, 7–A Supply Load – 0 – 10 A Note: All wire pairs should be twisted. Test Results... -
Page 20: Test Results
Test Results 2.3 Test Results Figures 2–2 to 2–7 show test results for the SLVP128. Figure 2–2. SLVP128 Measured Load and Line Regulation 1.84 V I = 5.5 V V I = 5 V 1.835 1.83 V I = 4.5 V 1.825... -
Page 21: Slvp128 Measured Power Dissipation
Test Results Figure 2–4. SLVP128 Measured Power Dissipation 3.00 2.50 2.00 V I = 5.5 V 1.50 V I = 5 V 1.00 V I = 4.5 V 0.50 0.00 Iout, A Figure 2–5. SLVP128 Measured Switching Frequency V I = 5 V V I = 5.5 V... -
Page 22: Slvp128 Measured Switching Waveforms
Test Results Figure 2–6. SLVP128 Measured Switching Waveforms 20 mV/div C1 Freq 256.43 kHz C2 Pk–Pk 29.6 mV 2 V/div 1 µsec/div Figure 2–7. SLVP128 Measured Start-Up Waveforms C1 Rise 8.408 ms Low Signal 1 V/div Amplitude C1 +Over 2.3% 2.5 V/div... -
Page 23: Schematic
Chapter 3 Schematic This chapter contains the schematic diagram for the SLVP128 EVM. Topic Page Schematic ........... . -
Page 24: Schematic
Schematic 3.1 Schematic Figure 3–1 shows the SLVP128 EVM schematic diagram. -
Page 25: Slvp128 Schematic Diagram
Schematic Figure 3–1. SLVP128 Schematic Diagram BOOT LOWDR HIGHDR DRVGND BOOTLO LOHIB HISENSE LODRV LOSENSE BIAS IOUTLO SLOWST INHIBIT ANAGND VID4 VSENSE VID3 VREFB VID2 VHYST VID1 VID0 PWRGD IOUT Schematic... -
Page 27: Physical Layouts
Chapter 4 Physical Layouts This chapter contains the board layout, and assembly drawings for the SLVP128 EVM. Topic Page Board Layout .......... -
Page 28: Board Layout
4.1 Board Layout The power supply module consists of one PWB. Figure 4–1 shows the top lay- er (front view) of the SLVP128 PWB. Figure 4–2 shows the bottom layer (top view) of the SLVP128 PWB. Figure 4–3 shows the SLVP128 top assembly view. Figure 4–4 shows a side view of the SLVP128 assembly. -
Page 29: Slvp128 Board Layout Bottom Layer
Board Layout Figure 4–2. SLVP128 Board Layout Bottom Layer Bottom Layer (Top View) Figure 4–3. SLVP128 Top Assembly View Back Front Top Assembly Physical Layouts... -
Page 30: Slvp128 Side View Of Assembly
Board Layout Figure 4–4. SLVP128 Side View of Assembly Front Back Side View of Assembly Figure 4–5. SLVP128 Pin Setup Detail View Front Detail of Pin Setup... -
Page 31: Bill Of Materials
Chapter 5 Bill of Materials This chapter contains the bill of materials required for the SLVP128 EVM. Topic Page Bill of Materials .......... -
Page 32: Slvp128 Bill Of Materials
Bill of Materials Bill of Materials EVM. Table 5–1 lists materials required for the SLVP128 EVM. Table 5–1. SLVP128 Bill of Materials Part Number Description Size 10TPA33M Capacitor, POSCAP, 33 uF, 10 V, 20% Sanyo GRM39X7R103K025A Capacitor, Ceramic, 0.01uF, 25V, 10%,... - Page 33 Bill of Materials Table 5–1. SLVP128 Bill of Materials (Continued) Part Number Description Size SML-LX2832GC-TR Diode. LED, Green, 2.1 V, SM Lumex 1210 J1– CA21BA-D36K-0FA Clip, surface-mount, 0.040” board, 0.1 Ctrs 0.090” stand-off Interplex Not used Resistor, chip, 0 Ω, 1/16W Not used Resistor, chip, 0 Ω, 1/16W...
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