Tektronix 7B10 Instruction Manual page 32

Theory
of
Operation
— 7B10
RAMP GENERATOR
The
Ramp
Generator
stages
produce
a linear positive-
going
ramp
for
the
Output
Preamplifier
and Sweep
Gate
Generator stages
Upon
the
arrival of
a Hl-level
sweep
start gate,
Q354
turns
on and
Q356
turns
off.
The
source
current
from
Q324
charges the timing capacitors (C364,
C365, C366)
in a positive
ramp.
Field effect transistors
Q372A,
Q372B, and
transistor
Q376
form
a unity-gain
ramp
voltage follower
for
the
sweep
ramp. The
output
of
Q376
is
connected
to
the Output
Preamplifier,
Sweep
Gate
Generator,
and
Auxiliary
Sweep
Preamplifier stages.
When
the
sweep
start
gate
is
LO,
Q354
turns
off
and
Q356
turns on causing the timing capacitors
(C364,
C365, and C366)
to
discharge Transistors
Q336
and
Q342
maintain
a
constant
level
from which
the
ramp
begins.
The
output
of
Q376
is
compared
(by
way
of
Q336A)
with the reference
level at
the
base
of
Q336B.
If
the output
of
Q376
is
less
than the
reference,
Q342
will
charge
the timing capacitors through
CR345
until
the
output
and
reference voltages are
equal.
If
the output
of
Q376
is
greater
than the
reference,
Q342
conducts
more
and
CR345
conducts
less
causing the timing capacitors
to
discharge through
0356
and R358.
When
the output
and
reference voltages are equal, the current through
CR345
and
0354
equal the current through 0356.
OUTPUT PREAMPLIFIER
The Output
Preamplifier stages
connect
the
differential
sweep
signal to the
mainframe and
provide
an
offset
voltage
for
trace positioning.
Provisions are
made
in
these stages
for
sweep
magnification,
and
a
negative-
going
sawtooth
signal
is
supplied
to the
mainframe
for
sawtooth output
and
special plug-in unit functions.
The sweep ramp
voltage
from
0376
is
coupled
to the
Output Preamplifier stage
at
the
base
of
0454.
Transistors
0454
and
0464
form
a
single-ended
to
push-
pull
converter with
0458
and
0468
as current follower
stages for
the push-pull
signal. Transistor
0460
is
employed
as
a
nonlinear capacitance
to
compensate
for
the nonlinear collector
to
base capacitance
of
0458.
Output
drivers
0476
and
0496
provide
final
amplification
and connect
the
sweep
signal
to
the
mainframe.
The
MAG
switch,
S460,
increases the Output
Preamplifier gain ten
times by connecting R461 and
R460
in parallel
with
R454
and R464.
In
the 2 ns
and
5
ns
f
IME/DIV
switch
positions
field
effect transistor
0484
is
biased
into a
low
resistance state setting the gain
of
the
Output
Preamplifier
at
two
times
its
normal
value.
Operational amplifier
U386
combines
the dc voltages
of
the
FINE
and POSITION
controls
to
produce
a position
voltage level at
its
output. This voltage
level
on
the
base
of
0464
provides
a
ramp waveform
offset
voltage
to
horizontally position the displayed
trace
AUXILIARY
SWEEP
PREAMPLIFIER
The
Auxiliary
Sweep
Preamplifier stage provides
a
negative-going
sweep ramp
to
the
mainframe
(via
interface
connector pins-A3
and
B3)
for
sawtooth
output
and
special plug-in unit functions.
Transistors
0434
and
0438
form
a unity-gain inverting amplifier
for
the
sawtooth
signal
from
the
ramp
voltage follower 0376.
Diode
CR434
provides emitter-base compensation.
SWEEP GATE
GENERATOR
The Sweep
Gate Generator produces an unblanking gate
for
the Z-axis
system
of
the
mainframe.
When
the
sweep
is
displayed, the
crt
is
unblanked
(gate level LO).
The
sweep
is
blanked
(gate level HI)
between
sweeps.
The sweep ramp
is
applied
to
the
base
of
0402.
A
comparison
voltage
is
set
at
the base
of
0406.
When
the
ramp
voltage
exceeds
the
comparison
voltage,
0402
turns
off
and
0406
couples
a HI level
through
common-
base transistor
0410. The
output
of
0410
is
coupled
to
041
5,
0420,
0425
and
to
the hold
off start
U220
(diagram
3) to initiate
hold
off.
The
Z-axis
gate from the Trigger Generator
circuit
(diagram
2) is
LO
at
the
start of
the sweep.
This
LO
level
turns
off
0420. The
resultant Hl-level
sweep
gate pulse
at
the collector
of
0420
is
coupled through
emitter
follower
0425
to
the
mainframe
for
sweep
unblanking.
At the
end
of
the
sweep,
the
HI level
from
the
collector of
0410
turns
0415
off
and
0420
on.
The
resultant
LO
is
coupled through
emitter follower
0425
to
the
mainframe
for
sweep
blanking.
<l>
TIME/DIVISION
AND
READOUT
SWITCHING
The
Readout
circuits
provide information
to
the
mainframe
readout system. Readout
circuitry
is
shown
on
the Time/Division
and Readout
Switching schematic
(diagram
5) at
the rear
of this
manual.
BASIC
READOUT SYSTEM
The
readout
system
in
7000-series
mainframes
provides
an alphanumeric
display
of
information
encoded
by the
plug-in
units.
This display
is
presented on
the
crt,
and
is
written by the
crt
beam
on
a
time-shared
basis
with the
analog
waveform
display.
The
readout
system produces
a
pulse
train
consisting
of
ten negative-going pulses
called time-slots
Each
pulse
represents
a
possible character
In
a
readout word, and
is
assigned
a
time
slot
number
corresponding
to
its
position
in
the
word
(refer to
Table
3-2).
Each time
slot
pulse
is
directed to
one
of
ten output
lines,
labeled
TS
1
through
3-9