Dram Configuration - JETWAY XBLUE-77A2 User Manual

Amd 770 & amd sb700 based m/b for socket am2+ 64-bit quad core amd processor

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Table Of Contents

Table of Contents

3-6-1 DRAM Configurations

DRAM Latency(tcl)

RAS to CAS R/W Delay (Trtc)

Row precharge Time(Trp)

Minimum RAS Active Time(Tras)

DRAM Command Rate

CKE base Power dowe mode

CKE Based Powerdown

Memclock tri-slating

Memclock Hole Remapping

DDRII Timing Item

RAS Cycle Time (Trc)

RAS to RAS Delay(Trrd)

Precharge Time(Trtp)

Write Recovery Time(Twr)

TwTr Command Delay

* Trfc 0 for DIMM1

Trfc 1 for DIMM 2

Trfc 2 for DIMM 3

Trfc 2 for DIMM 4

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Refresh Mode select

Read to write Delay tRTW

Read/Write Queue Bypass

Queue Bypass Max

Max Asynchronous Latency

Read Delay Trd

↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help

F5:Previous Values

RAS TO cas R/W Delay

The settings are: Auto,3T, 4T,5T and 6T.

RAS-to-CAS Delay

This field let's you insert a timing delay between the CAS and RAS strobe signals, used when

DRAM is written to, read from, or refreshed. Fast gives faster performance; and Slow gives

more stable performance. This field applies only when synchronous DRAM is installed in

the system.

Row Precharge Time

If an insufficient number of cycles is allowed for the RAS to accumulate its charge before

DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast

gives faster performance; and Slow gives more stable performance. This field applies only

when synchronous DRAM is installed in the system. The settings are: Auto,3T, 4T,5T and

6T.

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